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Searched refs:CSR_BASE (Results 1 – 6 of 6) sorted by relevance

/linux-4.4.14/drivers/net/wireless/iwlwifi/
Diwl-csr.h85 #define CSR_BASE (0x000) macro
87 #define CSR_HW_IF_CONFIG_REG (CSR_BASE+0x000) /* hardware interface config */
88 #define CSR_INT_COALESCING (CSR_BASE+0x004) /* accum ints, 32-usec units */
89 #define CSR_INT (CSR_BASE+0x008) /* host interrupt status/ack */
90 #define CSR_INT_MASK (CSR_BASE+0x00c) /* host interrupt enable */
91 #define CSR_FH_INT_STATUS (CSR_BASE+0x010) /* busmaster int status/ack*/
92 #define CSR_GPIO_IN (CSR_BASE+0x018) /* read external chip pins */
93 #define CSR_RESET (CSR_BASE+0x020) /* busmaster enable, NMI, etc*/
94 #define CSR_GP_CNTRL (CSR_BASE+0x024)
97 #define CSR_INT_PERIODIC_REG (CSR_BASE+0x005)
[all …]
/linux-4.4.14/drivers/net/wireless/iwlegacy/
Dcsr.h83 #define CSR_BASE (0x000) macro
85 #define CSR_HW_IF_CONFIG_REG (CSR_BASE+0x000) /* hardware interface config */
86 #define CSR_INT_COALESCING (CSR_BASE+0x004) /* accum ints, 32-usec units */
87 #define CSR_INT (CSR_BASE+0x008) /* host interrupt status/ack */
88 #define CSR_INT_MASK (CSR_BASE+0x00c) /* host interrupt enable */
89 #define CSR_FH_INT_STATUS (CSR_BASE+0x010) /* busmaster int status/ack */
90 #define CSR_GPIO_IN (CSR_BASE+0x018) /* read external chip pins */
91 #define CSR_RESET (CSR_BASE+0x020) /* busmaster enable, NMI, etc */
92 #define CSR_GP_CNTRL (CSR_BASE+0x024)
95 #define CSR_INT_PERIODIC_REG (CSR_BASE+0x005)
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/linux-4.4.14/arch/sparc/include/asm/
Dobio.h26 #define CSR_BASE(cpu) (((CSR_BASE_ADDR >> CSR_CPU_SHIFT) + cpu) << CSR_CPU_SHIFT) macro
126 "r" (CSR_BASE(cpu) + BW_PTIMER_LIMIT), in bw_get_prof_limit()
135 "r" (CSR_BASE(cpu) + BW_PTIMER_LIMIT), in bw_set_prof_limit()
145 "r" (CSR_BASE(cpu) + BW_CTRL), in bw_get_ctrl()
154 "r" (CSR_BASE(cpu) + BW_CTRL), in bw_set_ctrl()
/linux-4.4.14/drivers/scsi/
DNCR5380.h174 #define CSR_BASE CSR_SCSI_BUFF_INTR | CSR_53C80_INTR
176 #define CSR_BASE CSR_53C80_INTR macro
Dg_NCR5380.c531 NCR5380_write(C400_CONTROL_STATUS_REG, CSR_BASE | CSR_TRANS_DIR); in NCR5380_pread()
616 NCR5380_write(C400_CONTROL_STATUS_REG, CSR_BASE); in NCR5380_pwrite()
DNCR5380.c848 NCR5380_write(C400_CONTROL_STATUS_REG, CSR_BASE); in NCR5380_init()