Searched refs:CE1_CORE_RESET (Results 1 - 16 of 16) sorted by relevance
| /linux-4.4.14/arch/cris/boot/dts/include/dt-bindings/reset/ |
| H A D | qcom,gcc-msm8960.h | 67 #define CE1_CORE_RESET 50 macro
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| H A D | qcom,gcc-ipq806x.h | 64 #define CE1_CORE_RESET 47 macro
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| /linux-4.4.14/include/dt-bindings/reset/ |
| H A D | qcom,gcc-msm8960.h | 67 #define CE1_CORE_RESET 50 macro
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| H A D | qcom,gcc-ipq806x.h | 64 #define CE1_CORE_RESET 47 macro
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| /linux-4.4.14/arch/metag/boot/dts/include/dt-bindings/reset/ |
| H A D | qcom,gcc-msm8960.h | 67 #define CE1_CORE_RESET 50 macro
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| H A D | qcom,gcc-ipq806x.h | 64 #define CE1_CORE_RESET 47 macro
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| /linux-4.4.14/arch/mips/boot/dts/include/dt-bindings/reset/ |
| H A D | qcom,gcc-msm8960.h | 67 #define CE1_CORE_RESET 50 macro
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| H A D | qcom,gcc-ipq806x.h | 64 #define CE1_CORE_RESET 47 macro
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| /linux-4.4.14/arch/powerpc/boot/dts/include/dt-bindings/reset/ |
| H A D | qcom,gcc-msm8960.h | 67 #define CE1_CORE_RESET 50 macro
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| H A D | qcom,gcc-ipq806x.h | 64 #define CE1_CORE_RESET 47 macro
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| /linux-4.4.14/arch/arm64/boot/dts/include/dt-bindings/reset/ |
| H A D | qcom,gcc-msm8960.h | 67 #define CE1_CORE_RESET 50 macro
|
| H A D | qcom,gcc-ipq806x.h | 64 #define CE1_CORE_RESET 47 macro
|
| /linux-4.4.14/arch/arm/boot/dts/include/dt-bindings/reset/ |
| H A D | qcom,gcc-msm8960.h | 67 #define CE1_CORE_RESET 50 macro
|
| H A D | qcom,gcc-ipq806x.h | 64 #define CE1_CORE_RESET 47 macro
|
| /linux-4.4.14/drivers/clk/qcom/ |
| H A D | gcc-msm8960.c | 3210 [CE1_CORE_RESET] = { 0x2724, 7 },
3420 [CE1_CORE_RESET] = { 0x2724, 7 },
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| H A D | gcc-ipq806x.c | 2890 [CE1_CORE_RESET] = { 0x2724, 7 },
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