Searched refs:CACHE_MODE_0_GEN7 (Results 1 – 3 of 3) sorted by relevance
6664 I915_WRITE(CACHE_MODE_0_GEN7, _MASKED_BIT_DISABLE(RC_OP_FLUSH_ENABLE)); in haswell_init_clock_gating()6667 I915_WRITE(CACHE_MODE_0_GEN7, in haswell_init_clock_gating()6723 I915_WRITE(CACHE_MODE_0_GEN7, _MASKED_BIT_DISABLE(RC_OP_FLUSH_ENABLE)); in ivybridge_init_clock_gating()6767 I915_WRITE(CACHE_MODE_0_GEN7, in ivybridge_init_clock_gating()6830 I915_WRITE(CACHE_MODE_0_GEN7, _MASKED_BIT_DISABLE(RC_OP_FLUSH_ENABLE)); in valleyview_init_clock_gating()
839 WA_CLR_BIT_MASKED(CACHE_MODE_0_GEN7, HIZ_RAW_STALL_OPT_DISABLE); in gen8_init_workarounds()
1866 #define CACHE_MODE_0_GEN7 0x7000 /* IVB+ */ macro