/linux-4.4.14/Documentation/devicetree/bindings/clock/ |
D | lpc1850-cgu.txt | 42 specific LPC part. Base clocks are numbered from 0 to 27. 45 0 BASE_SAFE_CLK Base safe clock (always on) for WWDT 46 1 BASE_USB0_CLK Base clock for USB0 47 2 BASE_PERIPH_CLK Base clock for Cortex-M0SUB subsystem, 49 3 BASE_USB1_CLK Base clock for USB1 52 5 BASE_SPIFI_CLK Base clock for SPIFI 53 6 BASE_SPI_CLK Base clock for SPI 54 7 BASE_PHY_RX_CLK Base clock for Ethernet PHY Receive clock 55 8 BASE_PHY_TX_CLK Base clock for Ethernet PHY Transmit clock 56 9 BASE_APB1_CLK Base clock for APB peripheral block # 1 [all …]
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D | renesas,h8300-div-clock.txt | 11 - reg: Base address and length of the divide rate selector
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D | efm32-clock.txt | 5 - reg: Base address and length of the register set
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D | qca,ath79-pll.txt | 14 - reg: Base address and size of the controllers memory area
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D | renesas,r8a73a4-cpg-clocks.txt | 10 - reg: Base address and length of the memory resource used by the CPG
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D | renesas,sh73a0-cpg-clocks.txt | 12 - reg: Base address and length of the memory resource used by the CPG
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D | renesas,r8a7740-cpg-clocks.txt | 12 - reg: Base address and length of the memory resource used by the CPG
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D | renesas,r8a7778-cpg-clocks.txt | 11 - reg: Base address and length of the memory resource used by the CPG
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D | renesas,r8a7779-cpg-clocks.txt | 11 - reg: Base address and length of the memory resource used by the CPG
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D | renesas,cpg-div6-clocks.txt | 18 - reg: Base address and length of the memory resource used by the DIV6 clock
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D | renesas,rz-cpg-clocks.txt | 13 - reg: Base address and length of the memory resource used by the CPG
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D | renesas,rcar-gen2-cpg-clocks.txt | 17 - reg: Base address and length of the memory resource used by the CPG
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D | renesas,cpg-mssr.txt | 18 - reg: Base address and length of the memory resource used by the CPG/MSSR
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D | renesas,cpg-mstp-clocks.txt | 24 - reg: Base address and length of the I/O mapped registers used by the MSTP
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/linux-4.4.14/drivers/isdn/hardware/eicon/ |
D | io.c | 590 volatile byte __iomem *Base = DIVA_OS_MEM_ATTACH_RAM((PISDN_ADAPTER)a->io); in mem_in() local 591 val = READ_BYTE(Base + (unsigned long)addr); in mem_in() 592 DIVA_OS_MEM_DETACH_RAM((PISDN_ADAPTER)a->io, Base); in mem_in() 598 volatile byte __iomem *Base = DIVA_OS_MEM_ATTACH_RAM((PISDN_ADAPTER)a->io); in mem_inw() local 599 val = READ_WORD((Base + (unsigned long)addr)); in mem_inw() 600 DIVA_OS_MEM_DETACH_RAM((PISDN_ADAPTER)a->io, Base); in mem_inw() 605 volatile byte __iomem *Base = DIVA_OS_MEM_ATTACH_RAM((PISDN_ADAPTER)a->io); in mem_in_dw() local 607 *data++ = READ_DWORD((Base + (unsigned long)addr)); in mem_in_dw() 610 DIVA_OS_MEM_DETACH_RAM((PISDN_ADAPTER)a->io, Base); in mem_in_dw() 614 volatile byte __iomem *Base = DIVA_OS_MEM_ATTACH_RAM((PISDN_ADAPTER)a->io); in mem_in_buffer() local [all …]
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D | debug.c | 78 byte *Base; /* lowest address (constant) */ member 98 Q->Base = Q->Head = Q->Tail = Buffer; in queueInit() 125 if (Q->Base + need > Q->Head) { in queueAllocMsg() 130 Q->Tail = Q->Base; in queueAllocMsg() 161 Q->Head = Q->Base; in queueFreeMsg() 165 Q->Head = Q->Tail = Q->Base; in queueFreeMsg()
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/linux-4.4.14/Documentation/hwmon/ |
D | smsc47b397 | 31 pair is located at the HWM Base Address + 0 and the HWM Base Address + 1. The 32 HWM Base address can be obtained from Logical Device 8, registers 0x60 (MSB) 33 and 0x61 (LSB). Currently we are using 0x480 for the HWM Base Address and 138 Obtaining the HWM Base Address. 139 The following is an example of how to read the HWM Base Address located in 157 OUT DX,AL ; Point to HWM Base Addr MSB 159 IN AL,DX ; Get MSB of HWM Base Addr
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D | sysfs-interface | 263 pwm[1-*]_freq Base PWM frequency in Hz.
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/linux-4.4.14/arch/arm/boot/dts/ |
D | spear300.dtsi | 41 0x80000000 0x0010 /* NAND Base DATA */ 42 0x80020000 0x0010 /* NAND Base ADDR */ 43 0x80010000 0x0010>; /* NAND Base CMD */
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D | kirkwood-openrd-base.dts | 2 * Marvell OpenRD Base Board Description 19 model = "OpenRD Base";
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D | spear310.dtsi | 36 0x40000000 0x0010 /* NAND Base DATA */ 37 0x40020000 0x0010 /* NAND Base ADDR */ 38 0x40010000 0x0010>; /* NAND Base CMD */
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D | spear320.dtsi | 43 0x50000000 0x0010 /* NAND Base DATA */ 44 0x50020000 0x0010 /* NAND Base ADDR */ 45 0x50010000 0x0010>; /* NAND Base CMD */
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D | spear600.dtsi | 83 0xd2000000 0x0010 /* NAND Base DATA */ 84 0xd2020000 0x0010 /* NAND Base ADDR */ 85 0xd2010000 0x0010>; /* NAND Base CMD */
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D | spear13xx.dtsi | 144 0xb0800000 0x0010 /* NAND Base DATA */ 145 0xb0820000 0x0010 /* NAND Base ADDR */ 146 0xb0810000 0x0010>; /* NAND Base CMD */
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D | kirkwood-openrd.dtsi | 2 * Marvell OpenRD (Base|Client|Ultimate) Board Description
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D | ste-u300.dts | 281 <0x80000000 0x4000>, /* NAND Base DATA */ 282 <0x80020000 0x4000>, /* NAND Base ADDR */ 283 <0x80010000 0x4000>; /* NAND Base CMD */
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D | at91sam9x5ek.dtsi | 2 * at91sam9x5ek.dtsi - Device Tree file for AT91SAM9x5CM Base board
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D | ea3250.dts | 246 /* LEDs on Base Board */
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D | ste-nomadik-stn8815.dtsi | 639 <0x40000000 0x2000>, /* NAND Base DATA */ 640 <0x41000000 0x2000>, /* NAND Base ADDR */ 641 <0x40800000 0x2000>; /* NAND Base CMD */
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/linux-4.4.14/drivers/sn/ |
D | Kconfig | 9 tristate "SGI IOC3 Base IO support" 12 This option enables basic support for the SGI IOC3-based Base IO
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/linux-4.4.14/Documentation/networking/ |
D | arcnet-hardware.txt | 568 | Offs|Base |I/O Addr | 593 S1 1-3: I/O Base Address Select 594 4-6: Memory Base Address Select 617 Setting the I/O Base Address 621 of eight possible I/O Base addresses using the following table 637 Setting the Base Memory (RAM) buffer Address 642 Switches 4-6 of switch group S1 select the Base of the 16K block. 801 SW1 1-6: I/O Base Address Select 858 Setting the I/O Base Address 862 of 32 possible I/O Base addresses using the following table [all …]
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D | i40evf.txt | 1 Linux* Base Driver for Intel(R) Network Connection 14 This file describes the i40evf Linux* Base Driver for the Intel(R) XL710
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D | ixgbevf.txt | 1 Linux* Base Driver for Intel(R) Ethernet Network Connection 14 This file describes the ixgbevf Linux* Base Driver for Intel Network
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D | multiqueue.txt | 5 Section 1: Base driver requirements for implementing multiqueue support 12 Section 1: Base driver requirements for implementing multiqueue support 15 Base drivers are required to use the new alloc_etherdev_mq() or
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D | igbvf.txt | 1 Linux* Base Driver for Intel(R) Ethernet Network Connection 14 This file describes the igbvf Linux* Base Driver for Intel Network Connection.
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D | cs89x0.txt | 66 10BaseT-only or 3-media configurations (10BaseT, 10Base2, and AUI for 10Base-5 167 Base I/O Address: 300 168 Memory Base Address: D0000 490 located near the 10Base-T connector. 492 Link Integrity LED: A "steady" ON of the green LED indicates a valid 10Base-T 493 connection. (Only applies to 10Base-T. The green LED has no significance for 494 a 10Base-2 or AUI connection.) 576 * IO Base, Memory Base, IO or memory mode enabled, IRQ, DMA channel
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D | e100.txt | 1 Linux* Base Driver for the Intel(R) PRO/100 Family of Adapters 21 This file describes the Linux* Base Driver for the Intel(R) PRO/100 Family of 102 driver or module name, the name for the Linux Base Driver for the Intel
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D | ixgb.txt | 1 Linux Base Driver for 10 Gigabit Intel(R) Ethernet Network Connection 24 This file describes the ixgb Linux Base Driver for the 10 Gigabit Intel(R) 56 82597EX Intel(R) PRO/10GbE LR/SR/CX4 10G Base-LR (1310 nm optical fiber) 57 Server Adapters 10G Base-SR (850 nm optical fiber) 58 10G Base-CX4(twin-axial copper cabling) 282 name, the name for the Linux Base Driver for the Intel 10GbE Family of
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D | i40e.txt | 1 Linux Base Driver for the Intel(R) Ethernet Controller XL710 Family
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D | igb.txt | 1 Linux* Base Driver for Intel(R) Ethernet Network Connection
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D | tlan.txt | 57 the adapter to use the AUI interface instead of the 10 Base T
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D | ixgbe.txt | 1 Linux* Base Driver for the Intel(R) Ethernet 10 Gigabit PCI Express Family of
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D | e1000.txt | 1 Linux* Base Driver for Intel(R) Ethernet Network Connection
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D | bonding.txt | 692 2. Base driver support for setting the hardware 1768 Interrupt:10 Base address:0x1080 1775 Interrupt:9 Base address:0x1400
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/linux-4.4.14/Documentation/devicetree/bindings/mtd/ |
D | fsmc-nand.txt | 47 0xd2000000 0x0010 /* NAND Base DATA */ 48 0xd2020000 0x0010 /* NAND Base ADDR */ 49 0xd2010000 0x0010>; /* NAND Base CMD */
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D | orion-nand.txt | 5 - reg : Base physical address of the NAND and length of memory mapped
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/linux-4.4.14/Documentation/scsi/ |
D | hptiop.txt | 64 0x4000 Inbound List Base Address Low 65 0x4004 Inbound List Base Address High 68 0x4050 Outbound List Base Address Low 69 0x4054 Outbound List Base Address High 70 0x4058 Outbound List Copy Pointer Shadow Base Address Low 71 0x405C Outbound List Copy Pointer Shadow Base Address High
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/linux-4.4.14/arch/arm/boot/compressed/ |
D | head-sharpsl.S | 28 mov r1, #0x10000000 @ Base address of TC6393 chip 42 ldr r1, .W100ADDR @ Base address of w100 chip + regs offset 128 mov r1, #0x0c000000 @ Base address of NAND chip
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/linux-4.4.14/Documentation/virtual/kvm/devices/ |
D | arm-vgic.txt | 21 Base address in the guest physical address space of the GIC distributor 26 Base address in the guest physical address space of the GIC virtual cpu 31 Base address in the guest physical address space of the GICv3 distributor 36 Base address in the guest physical address space of the GICv3
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D | mpic.txt | 16 Base address of the 256 KiB MPIC register space. Must be
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/linux-4.4.14/Documentation/devicetree/bindings/media/ |
D | s5p-mfc.txt | 24 - samsung,mfc-r : Base address of the first memory bank used by MFC 27 - samsung,mfc-l : Base address of the second memory bank used by MFC
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D | hix5hd2-ir.txt | 5 - reg: Base physical address of the controller and length of memory
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D | renesas,jpu.txt | 14 - reg: Base address and length of the registers block for the JPU.
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D | st-rc.txt | 5 - reg: Base physical address of the controller and length of memory
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D | renesas,vsp1.txt | 11 - reg: Base address and length of the registers block for the VSP1.
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/linux-4.4.14/Documentation/devicetree/bindings/memory-controllers/ |
D | renesas,h8300-bsc.txt | 5 - reg: Base address and length of BSC registers.
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D | synopsys.txt | 9 - reg: Base address and size of the controllers memory area
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D | ath79-ddr-controller.txt | 14 - reg: Base address and size of the controllers memory area
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/linux-4.4.14/arch/arm/ |
D | Kconfig-nommu | 13 hex '(S)DRAM Base Address' if SET_MEM_PARAM 21 hex 'FLASH Base Address' if SET_MEM_PARAM
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/linux-4.4.14/Documentation/devicetree/bindings/rng/ |
D | st,rng.txt | 6 reg : Base address and size of IP's register map.
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/linux-4.4.14/arch/sh/kernel/cpu/sh2/ |
D | ex.S | 39 ! Exception Vector Base
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/linux-4.4.14/Documentation/devicetree/bindings/watchdog/ |
D | dw_wdt.txt | 6 - reg : Base address and size of the watchdog timer registers.
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/linux-4.4.14/arch/powerpc/boot/dts/fsl/ |
D | e500v2_power_isa.dtsi | 38 power-isa-b; // Base 40 power-isa-atb; // Alternate Time Base
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D | e5500_power_isa.dtsi | 38 power-isa-b; // Base 40 power-isa-atb; // Alternate Time Base
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D | e500mc_power_isa.dtsi | 38 power-isa-b; // Base 40 power-isa-atb; // Alternate Time Base
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D | e6500_power_isa.dtsi | 38 power-isa-b; // Base 40 power-isa-atb; // Alternate Time Base
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/linux-4.4.14/Documentation/devicetree/bindings/interrupt-controller/ |
D | renesas,h8s-intc.txt | 8 - regs: Base address of interrupt controller registers.
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D | renesas,h8300h-intc.txt | 8 - regs: Base address of interrupt controller registers.
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D | qca,ath79-misc-intc.txt | 9 - reg: Base address and size of the controllers memory area
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D | mips-gic.txt | 21 - reg : Base address and length of the GIC registers. If not present,
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D | st,spear3xx-shirq.txt | 27 - reg: Base address and size of shirq registers.
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D | samsung,exynos4210-combiner.txt | 26 - reg: Base address and size of interrupt combiner registers.
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D | renesas,intc-irqpin.txt | 13 - reg: Base address and length of each register bank used by the external
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/linux-4.4.14/Documentation/devicetree/bindings/reset/ |
D | ath79-reset.txt | 9 - reg: Base address and size of the controllers memory area
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/linux-4.4.14/Documentation/devicetree/bindings/gpio/ |
D | fujitsu,mb86s70-gpio.txt | 6 - reg: Base address and length of register space
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D | gpio-ath79.txt | 8 - reg: Base address and size of the controllers memory area
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D | renesas,gpio-rcar.txt | 15 - reg: Base address and length of each memory resource used by the GPIO
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D | gpio.txt | 221 gpio-base : Base GPIO ID in the GPIO controller 222 pinctrl-base : Base pinctrl pin ID in the pin controller
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/linux-4.4.14/arch/arm/mach-ks8695/include/mach/ |
D | entry-macro.S | 18 ldr \base, =KS8695_IRQ_VA @ Base address of interrupt controller
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/linux-4.4.14/Documentation/devicetree/bindings/sound/ |
D | sirf-audio-port.txt | 5 - reg: Base address and size entries:
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D | sirf-usp.txt | 5 - reg: Base address and size entries:
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D | st,sti-asoc-card.txt | 20 - reg: CPU DAI IP Base address and size entries, listed in same
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/linux-4.4.14/Documentation/devicetree/bindings/spi/ |
D | spi-ath79.txt | 5 - reg: Base address and size of the controllers memory area
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/linux-4.4.14/arch/sh/kernel/cpu/sh2a/ |
D | ex.S | 60 ! Exception Vector Base
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/linux-4.4.14/Documentation/devicetree/bindings/clock/st/ |
D | st,clkgen-prediv.txt | 4 Base address is located to the parent node. See clock binding[2]
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D | st,clkgen-mux.txt | 24 - reg : A Base address and length of the register set.
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D | st,clkgen-divmux.txt | 4 Base address is located to the parent node. See clock binding[2]
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D | st,quadfs.txt | 24 - reg : A Base address and length of the register set.
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D | st,clkgen-pll.txt | 4 Base address is located to the parent node. See clock binding[2]
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D | st,clkgen.txt | 56 - reg : A Base address and length of the register set.
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D | st,clkgen-vcc.txt | 21 - reg : A Base address and length of the register set.
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/linux-4.4.14/drivers/staging/clocking-wizard/ |
D | dt-binding.txt | 12 - reg: Base and size of the cores register space
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/linux-4.4.14/Documentation/devicetree/bindings/usb/ |
D | renesas_usbhs.txt | 9 - reg: Base address and length of the register for the USBHS
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/linux-4.4.14/arch/x86/crypto/sha-mb/ |
D | sha1_mb_mgr_datastruct.S | 96 # Macro Base size
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/linux-4.4.14/Documentation/i2c/busses/ |
D | scx200_acb | 11 Base addresses for the ACCESS.bus controllers on SCx200 and SC1100 devices
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/linux-4.4.14/Documentation/devicetree/bindings/pwm/ |
D | renesas,tpu-pwm.txt | 12 - reg: Base address and length of each memory resource used by the PWM
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/linux-4.4.14/Documentation/devicetree/bindings/iommu/ |
D | renesas,ipmmu-vmsa.txt | 11 - reg: Base address and size of the IPMMU registers.
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D | arm,smmu-v3.txt | 16 - reg : Base address and size of the SMMU.
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D | arm,smmu.txt | 23 - reg : Base address and size of the SMMU.
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/linux-4.4.14/Documentation/devicetree/bindings/mmc/ |
D | sdhci-msm.txt | 8 - reg: Base address and length of the register in the following order:
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/linux-4.4.14/arch/mn10300/ |
D | Kconfig | 150 hex "Base address of kernel RAM" 154 hex "Base address of vector table" 161 hex "Base address of kernel" 165 hex "Base address of compressed vmlinux image"
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/linux-4.4.14/drivers/net/wireless/realtek/rtlwifi/ |
D | efuse.c | 382 u8 section_idx, i, Base; in efuse_shadow_update_chk() local 387 Base = section_idx * 8; in efuse_shadow_update_chk() 391 if ((rtlefuse->efuse_map[EFUSE_INIT_MAP][Base + i] != in efuse_shadow_update_chk() 392 rtlefuse->efuse_map[EFUSE_MODIFY_MAP][Base + i]) || in efuse_shadow_update_chk() 393 (rtlefuse->efuse_map[EFUSE_INIT_MAP][Base + i + 1] != in efuse_shadow_update_chk() 394 rtlefuse->efuse_map[EFUSE_MODIFY_MAP][Base + i + in efuse_shadow_update_chk()
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/linux-4.4.14/arch/s390/kernel/ |
D | head_kdump.S | 59 basr %r13,0 # Base
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/linux-4.4.14/Documentation/isdn/ |
D | README.icn | 33 S3 S2 S1 Base-address 47 S1 S2 S3 S4 Base-Address
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D | README.act2000 | 17 S1 S2 S3 S4 Base-port
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D | syncPPP.FAQ | 63 my ISDN interface has a HWaddr and IRQ=0 and Base
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/linux-4.4.14/arch/mips/vr41xx/ |
D | Kconfig | 67 prompt "Base board type"
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/linux-4.4.14/drivers/video/fbdev/ |
D | neofb.c | 1178 int Base; in neofb_pan_display() local 1182 Base = (var->yoffset * info->var.xres_virtual + var->xoffset) >> 2; in neofb_pan_display() 1183 Base *= (info->var.bits_per_pixel + 7) / 8; in neofb_pan_display() 1190 vga_wcrt(state->vgabase, 0x0C, (Base & 0x00FF00) >> 8); in neofb_pan_display() 1191 vga_wcrt(state->vgabase, 0x0D, (Base & 0x00FF)); in neofb_pan_display() 1199 vga_wgfx(state->vgabase, 0x0E, (((Base >> 16) & 0x0f) | (oldExtCRTDispAddr & 0xf0))); in neofb_pan_display()
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/linux-4.4.14/Documentation/blockdev/ |
D | mflash.txt | 44 /* Base address of mflash */
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/linux-4.4.14/Documentation/devicetree/bindings/arm/omap/ |
D | crossbar.txt | 11 - reg: Base address and the size of the crossbar registers.
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/linux-4.4.14/fs/ocfs2/ |
D | Kconfig | 31 Cluster Base. It only requires a very small userspace component
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/linux-4.4.14/Documentation/ABI/testing/ |
D | sysfs-driver-genwqe | 62 Description: Base clock frequency of the card.
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/linux-4.4.14/arch/arm/plat-samsung/ |
D | Kconfig | 14 Base platform code for all Samsung SoC based systems 21 Base platform power management code for samsung code
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/linux-4.4.14/drivers/firmware/ |
D | Kconfig | 98 tristate "Dell Systems Management Base Driver" 101 The Dell Systems Management Base Driver provides a sysfs interface
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/linux-4.4.14/Documentation/devicetree/bindings/display/exynos/ |
D | exynos_dp.txt | 11 Base address of DP PHY register.
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/linux-4.4.14/Documentation/devicetree/bindings/serial/ |
D | renesas,sci-serial.txt | 40 - reg: Base address and length of the I/O registers used by the UART.
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/linux-4.4.14/Documentation/devicetree/bindings/pinctrl/ |
D | cnxt,cx92755-pinctrl.txt | 12 - reg: Base address of the General Purpose Pin Mapping register block and the
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D | renesas,pfc-pinctrl.txt | 25 - reg: Base address and length of each memory resource used by the pin
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D | brcm,bcm11351-pinctrl.txt | 11 - reg: Base address of the PAD Controller register block and the size
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D | samsung-pinctrl.txt | 23 - reg: Base address of the pin controller hardware module and length of
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/linux-4.4.14/Documentation/ |
D | dcdbas.txt | 3 The Dell Systems Management Base Driver provides a sysfs interface for
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D | parport.txt | 34 PCI parallel I/O card support comes from parport_pc. Base I/O
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D | 00-INDEX | 145 - information on the Dell Systems Management Base Driver.
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D | kernel-parameters.txt | 1475 Computing Base. This means IMA will measure all
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/linux-4.4.14/Documentation/devicetree/bindings/power_supply/ |
D | qcom_smbb.txt | 13 Description: Base address of registers for SMBB block
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/linux-4.4.14/Documentation/video4linux/cx2341x/ |
D | fw-memory.txt | 20 (Base Address Register 0). The addresses here are offsets relative to the
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/linux-4.4.14/arch/sh/kernel/cpu/sh3/ |
D | entry.S | 288 ! Exception Vector Base
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/linux-4.4.14/Documentation/arm64/ |
D | arm-acpi.txt | 4 the ARM SBSA (Server Base System Architecture) [0] and SBBR (Server 5 Base Boot Requirements) [1] specifications. Please note that the SBBR 476 "Server Base System Architecture", version 2.3, dated 27 Mar 2014 479 Document ARM-DEN-0044A, or newer: "Server Base Boot Requirements, System
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/linux-4.4.14/Documentation/trace/ |
D | uprobetracer.txt | 98 0000000000446420 g DF .text 0000000000000012 Base zfree
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/linux-4.4.14/arch/mips/ |
D | Kconfig.debug | 172 hex "UART Base Address"
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/linux-4.4.14/Documentation/video4linux/ |
D | README.ivtv | 78 Base devices
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/linux-4.4.14/Documentation/cgroups/ |
D | memcg_test.txt | 3 Base Kernel Version: based on 2.6.33-rc7-mm(candidate for 34).
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/linux-4.4.14/Documentation/devicetree/bindings/arm/ |
D | idle-states.txt | 16 According to the Server Base System Architecture document (SBSA, [3]), the 692 [3] ARM Server Base System Architecture (SBSA)
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/linux-4.4.14/Documentation/frv/ |
D | features.txt | 76 0xC0000000 Base of Linux kernel image
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/linux-4.4.14/drivers/zorro/ |
D | zorro.ids | 289 085e GFX-Base
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/linux-4.4.14/arch/arm/mach-s3c24xx/ |
D | Kconfig | 19 Base platform code for any Samsung S3C24XX device
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/linux-4.4.14/arch/arm/mach-imx/ |
D | Kconfig | 364 bool "Support Atmark Armadillo-500 Development Base Board"
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/linux-4.4.14/arch/xtensa/ |
D | Kconfig | 470 Base address of the LCD controller inside KIO region.
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/linux-4.4.14/arch/blackfin/ |
D | Kconfig | 403 hex "Physical RAM Base" 409 hex "Kernel ROM Base"
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/linux-4.4.14/Documentation/rapidio/ |
D | rapidio.txt | 254 is written into the device's Base Device ID CSR.
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/linux-4.4.14/drivers/misc/ |
D | Kconfig | 142 tristate "SGI IOC4 Base IO support"
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/linux-4.4.14/sound/oss/ |
D | Kconfig | 511 Base I/O port address for the CD-ROM interface of the Audio Excel
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/linux-4.4.14/drivers/message/fusion/lsi/ |
D | mpi_cnfg.h | 2159 CONFIG_PAGE_FC_PORT_10_BASE_SFP_DATA Base; /* 10h */ member
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/linux-4.4.14/drivers/char/ |
D | Kconfig | 488 tristate "NatSemi Base GPIO Support"
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/linux-4.4.14/Documentation/power/ |
D | pci.txt | 239 for PCI Express devices. Namely, the PCI Express Base Specification introduced 1048 PCI Express Base Specification, Rev. 2.0
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/linux-4.4.14/drivers/scsi/aic7xxx/ |
D | aic7xxx.reg | 1558 * Base address of our shared data with the kernel driver in host
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D | aic79xx.reg | 3902 * Base address of our shared data with the kernel driver in host
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/linux-4.4.14/drivers/eisa/ |
D | eisa.ids | 1153 NVL1201 "Novell NE32HUB 32-bit Base EISA Adapter"
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/linux-4.4.14/drivers/tty/serial/ |
D | Kconfig | 1034 If you have an SGI Altix with an IOC4 based Base IO card
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/linux-4.4.14/Documentation/filesystems/ |
D | proc.txt | 1185 PCI MMAPed I/O Base: 0xeb001000
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/linux-4.4.14/Documentation/virtual/kvm/ |
D | api.txt | 2278 __u32 page_shift; /* Base page shift of segment (or 0) */
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