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Searched refs:txdctl (Results 1 – 9 of 9) sorted by relevance

/linux-4.1.27/drivers/net/ethernet/intel/fm10k/
Dfm10k_common.c492 u32 txdctl = fm10k_read_reg(hw, FM10K_TXDCTL(0)); in fm10k_get_host_state_generic() local
498 if (!(~txdctl) || !(txdctl & FM10K_TXDCTL_ENABLE)) in fm10k_get_host_state_generic()
502 if (!mac->get_host_state || !(~txdctl)) in fm10k_get_host_state_generic()
506 if (hw->mac.tx_ready && !(txdctl & FM10K_TXDCTL_ENABLE)) { in fm10k_get_host_state_generic()
Dfm10k_pci.c514 u32 txdctl = FM10K_TXDCTL_ENABLE | (1 << FM10K_TXDCTL_MAX_TIME_SHIFT); in fm10k_configure_tx_ring() local
552 fm10k_write_reg(hw, FM10K_TXDCTL(reg_idx), txdctl); in fm10k_configure_tx_ring()
567 u32 txdctl; in fm10k_enable_tx_ring() local
577 txdctl = fm10k_read_reg(hw, FM10K_TXDCTL(reg_idx)); in fm10k_enable_tx_ring()
578 } while (!(txdctl & FM10K_TXDCTL_ENABLE) && --wait_loop); in fm10k_enable_tx_ring()
Dfm10k_pf.c848 u32 msg[4], txdctl, txqctl, tdbal = 0, tdbah = 0; in fm10k_iov_assign_default_mac_vlan_pf() local
885 txdctl = fm10k_read_reg(hw, FM10K_TXDCTL(vf_q_idx)); in fm10k_iov_assign_default_mac_vlan_pf()
886 for (timeout = 0; txdctl & FM10K_TXDCTL_ENABLE; timeout++) { in fm10k_iov_assign_default_mac_vlan_pf()
894 txdctl = fm10k_read_reg(hw, FM10K_TXDCTL(vf_q_idx)); in fm10k_iov_assign_default_mac_vlan_pf()
/linux-4.1.27/drivers/net/ethernet/intel/igbvf/
Dnetdev.c1288 u32 txdctl, dca_txctrl; in igbvf_configure_tx() local
1291 txdctl = er32(TXDCTL(0)); in igbvf_configure_tx()
1292 ew32(TXDCTL(0), txdctl & ~E1000_TXDCTL_QUEUE_ENABLE); in igbvf_configure_tx()
1315 txdctl |= E1000_TXDCTL_QUEUE_ENABLE; in igbvf_configure_tx()
1316 ew32(TXDCTL(0), txdctl); in igbvf_configure_tx()
1511 u32 rxdctl, txdctl; in igbvf_down() local
1526 txdctl = er32(TXDCTL(0)); in igbvf_down()
1527 ew32(TXDCTL(0), txdctl & ~E1000_TXDCTL_QUEUE_ENABLE); in igbvf_down()
/linux-4.1.27/drivers/net/ethernet/intel/e1000e/
Dich8lan.c4645 u32 ctrl_ext, txdctl, snoop; in e1000_init_hw_ich8lan() local
4682 txdctl = er32(TXDCTL(0)); in e1000_init_hw_ich8lan()
4683 txdctl = ((txdctl & ~E1000_TXDCTL_WTHRESH) | in e1000_init_hw_ich8lan()
4685 txdctl = ((txdctl & ~E1000_TXDCTL_PTHRESH) | in e1000_init_hw_ich8lan()
4687 ew32(TXDCTL(0), txdctl); in e1000_init_hw_ich8lan()
4688 txdctl = er32(TXDCTL(1)); in e1000_init_hw_ich8lan()
4689 txdctl = ((txdctl & ~E1000_TXDCTL_WTHRESH) | in e1000_init_hw_ich8lan()
4691 txdctl = ((txdctl & ~E1000_TXDCTL_PTHRESH) | in e1000_init_hw_ich8lan()
4693 ew32(TXDCTL(1), txdctl); in e1000_init_hw_ich8lan()
Dnetdev.c2963 u32 txdctl = er32(TXDCTL(0)); in e1000_configure_tx() local
2965 txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH | in e1000_configure_tx()
2976 txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE; in e1000_configure_tx()
2977 ew32(TXDCTL(0), txdctl); in e1000_configure_tx()
/linux-4.1.27/drivers/net/ethernet/intel/ixgbevf/
Dixgbevf_main.c1549 u32 txdctl = IXGBE_TXDCTL_ENABLE; in ixgbevf_configure_tx_ring() local
1583 txdctl |= (8 << 16); /* WTHRESH = 8 */ in ixgbevf_configure_tx_ring()
1586 txdctl |= (1 << 8) | /* HTHRESH = 1 */ in ixgbevf_configure_tx_ring()
1591 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx), txdctl); in ixgbevf_configure_tx_ring()
1596 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(reg_idx)); in ixgbevf_configure_tx_ring()
1597 } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE)); in ixgbevf_configure_tx_ring()
/linux-4.1.27/drivers/net/ethernet/intel/igb/
Digb_main.c3274 u32 txdctl = 0; in igb_configure_tx_ring() local
3293 txdctl |= IGB_TX_PTHRESH; in igb_configure_tx_ring()
3294 txdctl |= IGB_TX_HTHRESH << 8; in igb_configure_tx_ring()
3295 txdctl |= IGB_TX_WTHRESH << 16; in igb_configure_tx_ring()
3297 txdctl |= E1000_TXDCTL_QUEUE_ENABLE; in igb_configure_tx_ring()
3298 wr32(E1000_TXDCTL(reg_idx), txdctl); in igb_configure_tx_ring()
/linux-4.1.27/drivers/net/ethernet/intel/ixgbe/
Dixgbe_main.c2995 u32 txdctl = IXGBE_TXDCTL_ENABLE; in ixgbe_configure_tx_ring() local
3022 txdctl |= (1 << 16); /* WTHRESH = 1 */ in ixgbe_configure_tx_ring()
3024 txdctl |= (8 << 16); /* WTHRESH = 8 */ in ixgbe_configure_tx_ring()
3030 txdctl |= (1 << 8) | /* HTHRESH = 1 */ in ixgbe_configure_tx_ring()
3055 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl); in ixgbe_configure_tx_ring()
3065 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx)); in ixgbe_configure_tx_ring()
3066 } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE)); in ixgbe_configure_tx_ring()