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Searched refs:t9 (Results 1 – 22 of 22) sorted by relevance

/linux-4.1.27/arch/mips/kernel/
Docteon_switch.S72 LONG_L t9, LONGSIZE(t1)/* Load from CVMSEG */
77 LONG_S t9, -LONGSIZE(t2)/* Store CVMSEG to thread storage */
89 LONG_L t9, TASK_STACK_CANARY(a1)
90 LONG_S t9, 0(t8)
123 dmfc0 t9, $9,7 /* CvmCtl register. */
132 bbit1 t9, 28, 1f
140 1: bbit1 t9, 26, 3f /* done if CvmCtl[NOCRYPTO] set */
286 dmfc0 t9, $9,7 /* CvmCtl register. */
297 bbit1 t9, 28, 2f /* Skip LLM if CvmCtl[NODFA_CP2] is set */
307 bbit1 t9, 26, done_restore /* done if CvmCtl[NOCRYPTO] set */
Dcps-vec.S314 li t9, 0
331 mfc0 t9, $15, 1
332 and t9, t9, t1
336 mul v0, t9, t1
440 sll t0, t0, t9
Dr2300_switch.S71 LONG_L t9, TASK_STACK_CANARY(a1)
72 LONG_S t9, 0(t8)
Dr4k_switch.S87 LONG_L t9, TASK_STACK_CANARY(a1)
88 LONG_S t9, 0(t8)
Dpm-cps.c85 t8, t9, k0, k1, gp, sp, fp, ra, enumerator
/linux-4.1.27/arch/mips/include/asm/
Dregdef.h51 #define t9 $25 macro
94 #define t9 $25 /* callee address for PIC/temp */ macro
/linux-4.1.27/arch/ia64/lib/
Dcopy_page_mck.S82 #define t9 t5 // alias! macro
161 (p[D]) ld8 t9 = [src0], 3*8
168 (p[D]) st8 [dst0] = t9, 3*8
Dmemcpy_mck.S51 #define t9 t5 // alias! macro
240 EX(.ex_handler, (p[D]) ld8 t9 = [src0], 3*8)
247 EX(.ex_handler, (p[D]) st8 [dst0] = t9, 3*8)
/linux-4.1.27/arch/alpha/lib/
Dstxcpy.S38 .frame sp, 0, t9
90 ret (t9) # .. e1 :
98 .frame sp, 0, t9
229 ret (t9) # .. e1 :
287 ret (t9) # e1 :
Dev6-stxcpy.S49 .frame sp, 0, t9
108 ret (t9) # L0 : Latency=3
118 .frame sp, 0, t9
258 ret (t9) # L0 : Latency=3
317 ret (t9) # e1 :
Dstxncpy.S46 .frame sp, 0, t9, 0
104 ret (t9) # e1 :
117 .frame sp, 0, t9, 0
265 ret (t9) # .. e1 :
343 ret (t9) # .. e1 :
Dev6-stxncpy.S57 .frame sp, 0, t9, 0
132 ret (t9) # L0 : Latency=3
149 .frame sp, 0, t9, 0
311 ret (t9) # L0 : Latency=3
392 ret (t9) # L0 : Latency=3
/linux-4.1.27/arch/alpha/include/uapi/asm/
Dregdef.h32 #define t9 $23 macro
/linux-4.1.27/arch/tile/kernel/
Dhvglue_trace.c160 #define __HV_DECL9(t9, a9, ...) t9 a9, __HV_DECL8(__VA_ARGS__) argument
169 #define __HV_PASS9(t9, a9, ...) a9, __HV_PASS8(__VA_ARGS__) argument
/linux-4.1.27/arch/mips/kvm/
Dlocore.S433 PTR_LA t9, kvm_mips_handle_exit
434 jalr.hb t9
/linux-4.1.27/arch/mips/lib/
Dmemset.S101 move t9, a1
Dcsum_partial.S321 #define errptr t9
/linux-4.1.27/drivers/gpu/drm/gma500/
Dintel_bios.h461 u16 t9; member
Dintel_bios.c97 dev_priv->edp.pps.t9, dev_priv->edp.pps.t10, in parse_edp()
Dcdv_intel_dp.c2092 cur.t9 = (pp_off & PANEL_LIGHT_OFF_DELAY_MASK) >> in cdv_intel_dp_init()
2102 cur.t1_t3, cur.t8, cur.t9, cur.t10, cur.t11_t12); in cdv_intel_dp_init()
2107 intel_dp->backlight_off_delay = cur.t9 / 10; in cdv_intel_dp_init()
/linux-4.1.27/drivers/gpu/drm/i915/
Dintel_bios.h536 u16 t9; member
Dintel_dp.c4849 cur.t9 = (pp_off & PANEL_LIGHT_OFF_DELAY_MASK) >> in intel_dp_init_panel_power_sequencer()
4859 cur.t1_t3, cur.t8, cur.t9, cur.t10, cur.t11_t12); in intel_dp_init_panel_power_sequencer()
4867 spec.t9 = 50 * 10; /* no limit for t9, make it symmetric with t8 */ in intel_dp_init_panel_power_sequencer()
4876 vbt.t1_t3, vbt.t8, vbt.t9, vbt.t10, vbt.t11_t12); in intel_dp_init_panel_power_sequencer()
4885 assign_final(t9); in intel_dp_init_panel_power_sequencer()
4893 intel_dp->backlight_off_delay = get_delay(t9); in intel_dp_init_panel_power_sequencer()