| /linux-4.1.27/drivers/clk/sunxi/ |
| D | clk-usb.c | 91 u32 reset_mask; member
148 if (data->reset_mask == 0) in sunxi_usb_clk_setup()
166 reset_data->rcdev.nr_resets = __fls(data->reset_mask) + 1; in sunxi_usb_clk_setup()
174 .reset_mask = BIT(2) | BIT(1) | BIT(0),
187 .reset_mask = BIT(1) | BIT(0),
198 .reset_mask = BIT(2) | BIT(1) | BIT(0),
209 .reset_mask = BIT(19) | BIT(18) | BIT(17),
223 .reset_mask = BIT(21) | BIT(20) | BIT(19) | BIT(18) | BIT(17),
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| /linux-4.1.27/drivers/gpu/drm/radeon/ |
| D | ni.c | 1729 u32 reset_mask = 0; in cayman_gpu_check_soft_reset() local
1740 reset_mask |= RADEON_RESET_GFX; in cayman_gpu_check_soft_reset()
1744 reset_mask |= RADEON_RESET_CP; in cayman_gpu_check_soft_reset()
1747 reset_mask |= RADEON_RESET_GRBM | RADEON_RESET_GFX | RADEON_RESET_CP; in cayman_gpu_check_soft_reset()
1752 reset_mask |= RADEON_RESET_DMA; in cayman_gpu_check_soft_reset()
1757 reset_mask |= RADEON_RESET_DMA1; in cayman_gpu_check_soft_reset()
1762 reset_mask |= RADEON_RESET_DMA; in cayman_gpu_check_soft_reset()
1765 reset_mask |= RADEON_RESET_DMA1; in cayman_gpu_check_soft_reset()
1770 reset_mask |= RADEON_RESET_RLC; in cayman_gpu_check_soft_reset()
1773 reset_mask |= RADEON_RESET_IH; in cayman_gpu_check_soft_reset()
[all …]
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| D | r600.c | 1563 u32 reset_mask = 0; in r600_gpu_check_soft_reset() local
1574 reset_mask |= RADEON_RESET_GFX; in r600_gpu_check_soft_reset()
1581 reset_mask |= RADEON_RESET_GFX; in r600_gpu_check_soft_reset()
1586 reset_mask |= RADEON_RESET_CP; in r600_gpu_check_soft_reset()
1589 reset_mask |= RADEON_RESET_GRBM | RADEON_RESET_GFX | RADEON_RESET_CP; in r600_gpu_check_soft_reset()
1594 reset_mask |= RADEON_RESET_DMA; in r600_gpu_check_soft_reset()
1599 reset_mask |= RADEON_RESET_RLC; in r600_gpu_check_soft_reset()
1602 reset_mask |= RADEON_RESET_IH; in r600_gpu_check_soft_reset()
1605 reset_mask |= RADEON_RESET_SEM; in r600_gpu_check_soft_reset()
1608 reset_mask |= RADEON_RESET_GRBM; in r600_gpu_check_soft_reset()
[all …]
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| D | evergreen_dma.c | 173 u32 reset_mask = evergreen_gpu_check_soft_reset(rdev); in evergreen_dma_is_lockup() local
175 if (!(reset_mask & RADEON_RESET_DMA)) { in evergreen_dma_is_lockup()
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| D | evergreen.c | 3868 u32 reset_mask = 0; in evergreen_gpu_check_soft_reset() local
3878 reset_mask |= RADEON_RESET_GFX; in evergreen_gpu_check_soft_reset()
3882 reset_mask |= RADEON_RESET_CP; in evergreen_gpu_check_soft_reset()
3885 reset_mask |= RADEON_RESET_GRBM | RADEON_RESET_GFX | RADEON_RESET_CP; in evergreen_gpu_check_soft_reset()
3890 reset_mask |= RADEON_RESET_DMA; in evergreen_gpu_check_soft_reset()
3895 reset_mask |= RADEON_RESET_DMA; in evergreen_gpu_check_soft_reset()
3900 reset_mask |= RADEON_RESET_RLC; in evergreen_gpu_check_soft_reset()
3903 reset_mask |= RADEON_RESET_IH; in evergreen_gpu_check_soft_reset()
3906 reset_mask |= RADEON_RESET_SEM; in evergreen_gpu_check_soft_reset()
3909 reset_mask |= RADEON_RESET_GRBM; in evergreen_gpu_check_soft_reset()
[all …]
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| D | si.c | 3770 u32 reset_mask = 0; in si_gpu_check_soft_reset() local
3781 reset_mask |= RADEON_RESET_GFX; in si_gpu_check_soft_reset()
3785 reset_mask |= RADEON_RESET_CP; in si_gpu_check_soft_reset()
3788 reset_mask |= RADEON_RESET_GRBM | RADEON_RESET_GFX | RADEON_RESET_CP; in si_gpu_check_soft_reset()
3793 reset_mask |= RADEON_RESET_RLC; in si_gpu_check_soft_reset()
3798 reset_mask |= RADEON_RESET_DMA; in si_gpu_check_soft_reset()
3803 reset_mask |= RADEON_RESET_DMA1; in si_gpu_check_soft_reset()
3808 reset_mask |= RADEON_RESET_DMA; in si_gpu_check_soft_reset()
3811 reset_mask |= RADEON_RESET_DMA1; in si_gpu_check_soft_reset()
3817 reset_mask |= RADEON_RESET_IH; in si_gpu_check_soft_reset()
[all …]
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| D | si_dma.c | 43 u32 reset_mask = si_gpu_check_soft_reset(rdev); in si_dma_is_lockup() local
51 if (!(reset_mask & mask)) { in si_dma_is_lockup()
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| D | cik.c | 5236 u32 reset_mask = 0; in cik_gpu_check_soft_reset() local
5247 reset_mask |= RADEON_RESET_GFX; in cik_gpu_check_soft_reset()
5250 reset_mask |= RADEON_RESET_CP; in cik_gpu_check_soft_reset()
5255 reset_mask |= RADEON_RESET_RLC; in cik_gpu_check_soft_reset()
5260 reset_mask |= RADEON_RESET_DMA; in cik_gpu_check_soft_reset()
5265 reset_mask |= RADEON_RESET_DMA1; in cik_gpu_check_soft_reset()
5270 reset_mask |= RADEON_RESET_DMA; in cik_gpu_check_soft_reset()
5273 reset_mask |= RADEON_RESET_DMA1; in cik_gpu_check_soft_reset()
5279 reset_mask |= RADEON_RESET_IH; in cik_gpu_check_soft_reset()
5282 reset_mask |= RADEON_RESET_SEM; in cik_gpu_check_soft_reset()
[all …]
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| D | r600_dma.c | 210 u32 reset_mask = r600_gpu_check_soft_reset(rdev); in r600_dma_is_lockup() local
212 if (!(reset_mask & RADEON_RESET_DMA)) { in r600_dma_is_lockup()
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| D | ni_dma.c | 289 u32 reset_mask = cayman_gpu_check_soft_reset(rdev); in cayman_dma_is_lockup() local
297 if (!(reset_mask & mask)) { in cayman_dma_is_lockup()
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| D | cik_sdma.c | 772 u32 reset_mask = cik_gpu_check_soft_reset(rdev); in cik_sdma_is_lockup() local
780 if (!(reset_mask & mask)) { in cik_sdma_is_lockup()
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| /linux-4.1.27/drivers/net/ethernet/ibm/ |
| D | ibmveth.h | 76 unsigned long reset_mask, unsigned long set_mask, in h_illan_attributes() argument
83 reset_mask, set_mask); in h_illan_attributes()
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| /linux-4.1.27/include/linux/ |
| D | ioc3.h | 65 int reset_mask; /* non-zero if you want the ioc3.c module to reset interrupts */ member
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| /linux-4.1.27/drivers/scsi/aacraid/ |
| D | src.c | 557 u32 var, reset_mask; in aac_src_restart_adapter() local
565 0, 0, 0, 0, 0, 0, &var, &reset_mask, NULL, NULL, NULL); in aac_src_restart_adapter()
570 reset_mask = dev->doorbell_mask; in aac_src_restart_adapter()
585 src_writel(dev, MUnit.IDR, reset_mask); in aac_src_restart_adapter()
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| /linux-4.1.27/drivers/sn/ |
| D | ioc3.c | 430 if (ioc3_submodules[id]->reset_mask) in ioc3_intr_io()
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| /linux-4.1.27/drivers/net/ethernet/3com/ |
| D | 3c59x.c | 1963 int do_tx_reset = 0, reset_mask = 0; in vortex_error() local
1991 reset_mask = 0x0108; /* Reset interface logic, but not download logic */ in vortex_error()
2055 issue_and_wait(dev, TxReset|reset_mask); in vortex_error()
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