Searched refs:regChainOffset (Results  1 – 3 of 3) sorted by relevance
| /linux-4.1.27/drivers/net/wireless/ath/ath9k/ | 
| D | eeprom_def.c | 467 				  u8 txRxAttenLocal, int regChainOffset, int i)  in ath9k_hw_def_set_gain()  argument 474 			REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset,  in ath9k_hw_def_set_gain() 477 			REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset,  in ath9k_hw_def_set_gain() 480 			REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset,  in ath9k_hw_def_set_gain() 483 			REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset,  in ath9k_hw_def_set_gain() 487 			REG_RMW(ah, AR_PHY_GAIN_2GHZ + regChainOffset,  in ath9k_hw_def_set_gain() 490 			REG_RMW(ah, AR_PHY_GAIN_2GHZ + regChainOffset,  in ath9k_hw_def_set_gain() 498 		      AR_PHY_RXGAIN + regChainOffset,  in ath9k_hw_def_set_gain() 501 		      AR_PHY_RXGAIN + regChainOffset,  in ath9k_hw_def_set_gain() 504 		REG_RMW(ah, AR_PHY_RXGAIN + regChainOffset,  in ath9k_hw_def_set_gain() [all …] 
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| D | eeprom_9287.c | 420 	u32 reg32, regOffset, regChainOffset, regval;  in ath9k_hw_set_ar9287_power_cal_table()  local 466 		regChainOffset = i * 0x1000;  in ath9k_hw_set_ar9287_power_cal_table() 511 						  AR_PHY_TPCRG5 + regChainOffset,  in ath9k_hw_set_ar9287_power_cal_table() 533 					(672 << 2) + regChainOffset;  in ath9k_hw_set_ar9287_power_cal_table() 912 	u32 regChainOffset, regval;  in ath9k_hw_ar9287_set_board_values()  local 921 		regChainOffset = i * 0x1000;  in ath9k_hw_ar9287_set_board_values() 923 		REG_WRITE(ah, AR_PHY_SWITCH_CHAIN_0 + regChainOffset,  in ath9k_hw_ar9287_set_board_values() 926 		REG_WRITE(ah, AR_PHY_TIMING_CTRL4(0) + regChainOffset,  in ath9k_hw_ar9287_set_board_values() 927 			  (REG_READ(ah, AR_PHY_TIMING_CTRL4(0) + regChainOffset)  in ath9k_hw_ar9287_set_board_values() 937 		REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset,  in ath9k_hw_ar9287_set_board_values() [all …] 
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| D | eeprom_4k.c | 364 	u32 reg32, regOffset, regChainOffset;  in ath9k_hw_set_4k_power_cal_table()  local 403 		regChainOffset = i * 0x1000;  in ath9k_hw_set_4k_power_cal_table() 416 			REG_WRITE(ah, AR_PHY_TPCRG5 + regChainOffset,  in ath9k_hw_set_4k_power_cal_table() 428 			regOffset = AR_PHY_BASE + (672 << 2) + regChainOffset;  in ath9k_hw_set_4k_power_cal_table() 435 					i, regChainOffset, regOffset,  in ath9k_hw_set_4k_power_cal_table()
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