| /linux-4.1.27/drivers/staging/rtl8192u/ |
| D | r819xU_phy.c | 652 priv->PHYRegDef[RF90_PATH_A].rfAGCControl1 = rOFDM0_XAAGCCore1; in rtl8192_InitBBRFRegDef()
888 read_nic_byte(dev, rOFDM0_XAAGCCore1, &priv->DefaultInitialGain[0]); in rtl8192_phy_getTxPower()
1723 (u8)rtl8192_QueryBBReg(dev, rOFDM0_XAAGCCore1, bitmask); in InitialGainOperateWorkItemCallBack()
1747 write_nic_byte(dev, rOFDM0_XAAGCCore1, initial_gain); in InitialGainOperateWorkItemCallBack()
1762 rtl8192_setBBreg(dev, rOFDM0_XAAGCCore1, bitmask, in InitialGainOperateWorkItemCallBack()
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| D | r8192U_dm.c | 1550 rtl8192_setBBreg(dev, rOFDM0_XAAGCCore1, bit_mask, (u32)priv->initgain_backup.xaagccore1); in dm_bb_initialgain_restore()
1590 priv->initgain_backup.xaagccore1 = (u8)rtl8192_QueryBBReg(dev, rOFDM0_XAAGCCore1, bit_mask); in dm_bb_initialgain_backup()
1838 write_nic_byte(dev, rOFDM0_XAAGCCore1, 0x17); in dm_ctrl_initgain_byrssi_by_fwfalse_alarm()
1891 write_nic_byte(dev, rOFDM0_XAAGCCore1, 0x2c); in dm_ctrl_initgain_byrssi_by_fwfalse_alarm()
1896 write_nic_byte(dev, rOFDM0_XAAGCCore1, 0x20); in dm_ctrl_initgain_byrssi_by_fwfalse_alarm()
2050 read_nic_byte(dev, rOFDM0_XAAGCCore1, &tmp); in dm_initial_gain()
2060 write_nic_byte(dev, rOFDM0_XAAGCCore1, initial_gain); in dm_initial_gain()
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| D | r819xU_phyreg.h | 129 #define rOFDM0_XAAGCCore1 0xc50 macro
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| /linux-4.1.27/drivers/staging/rtl8192e/rtl8192e/ |
| D | r8192E_phy.c | 455 priv->PHYRegDef[RF90_PATH_A].rfAGCControl1 = rOFDM0_XAAGCCore1; in rtl8192_InitBBRFRegDef()
625 priv->DefaultInitialGain[0] = read_nic_byte(dev, rOFDM0_XAAGCCore1); in rtl8192_phy_getTxPower()
1318 (u8)rtl8192_QueryBBReg(dev, rOFDM0_XAAGCCore1, in InitialGain819xPci()
1351 write_nic_byte(dev, rOFDM0_XAAGCCore1, initial_gain); in InitialGain819xPci()
1367 rtl8192_setBBreg(dev, rOFDM0_XAAGCCore1, BitMask, in InitialGain819xPci()
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| D | rtl_dm.c | 1597 rtl8192_setBBreg(dev, rOFDM0_XAAGCCore1, bit_mask, (u32)priv->initgain_backup.xaagccore1); in dm_bb_initialgain_restore()
1634 priv->initgain_backup.xaagccore1 = (u8)rtl8192_QueryBBReg(dev, rOFDM0_XAAGCCore1, bit_mask); in dm_bb_initialgain_backup()
1838 write_nic_byte(dev, rOFDM0_XAAGCCore1, 0x17); in dm_ctrl_initgain_byrssi_by_fwfalse_alarm()
1869 write_nic_byte(dev, rOFDM0_XAAGCCore1, 0x2c); in dm_ctrl_initgain_byrssi_by_fwfalse_alarm()
1874 write_nic_byte(dev, rOFDM0_XAAGCCore1, 0x20); in dm_ctrl_initgain_byrssi_by_fwfalse_alarm()
1970 if (dm_digtable.pre_ig_value != read_nic_byte(dev, rOFDM0_XAAGCCore1)) in dm_initial_gain()
1976 write_nic_byte(dev, rOFDM0_XAAGCCore1, initial_gain); in dm_initial_gain()
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| D | r819xE_phyreg.h | 148 #define rOFDM0_XAAGCCore1 0xc50 macro
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| D | r8192E_phyreg.h | 143 #define rOFDM0_XAAGCCore1 0xc50 macro
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| /linux-4.1.27/drivers/staging/rtl8723au/hal/ |
| D | odm.c | 1564 Regc50 = rtl8723au_read32(adapter, rOFDM0_XAAGCCore1); in ODM_SingleDualAntennaDetection()
1669 val32 = rtl8723au_read32(adapter, rOFDM0_XAAGCCore1); in ODM_SingleDualAntennaDetection()
1672 rtl8723au_write32(adapter, rOFDM0_XAAGCCore1, val32); in ODM_SingleDualAntennaDetection()
1674 rtl8723au_write32(adapter, rOFDM0_XAAGCCore1, Regc50); in ODM_SingleDualAntennaDetection()
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| D | rtl8723a_phycfg.c | 505 pHalData->PHYRegDef[RF_PATH_A].rfAGCControl1 = rOFDM0_XAAGCCore1; in phy_InitBBRFRegisterDefinition()
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| /linux-4.1.27/drivers/staging/rtl8188eu/hal/ |
| D | bb_cfg.c | 650 reg[RF_PATH_A]->rfAGCControl1 = rOFDM0_XAAGCCore1; in rtl88e_phy_init_bb_rf_register_definition()
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| /linux-4.1.27/drivers/staging/rtl8712/ |
| D | rtl871x_mp_phy_regdef.h | 207 #define rOFDM0_XAAGCCore1 0xc50 /* DIG */ macro
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| /linux-4.1.27/drivers/staging/rtl8188eu/include/ |
| D | Hal8188EPhyReg.h | 205 #define rOFDM0_XAAGCCore1 0xc50 /* DIG */ macro
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| D | rtw_mp_phy_regdef.h | 224 #define rOFDM0_XAAGCCore1 0xc50 /* DIG */ macro
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| /linux-4.1.27/drivers/staging/rtl8723au/include/ |
| D | Hal8723APhyReg.h | 181 #define rOFDM0_XAAGCCore1 0xc50 /* DIG */ macro
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