Searched refs:rOFDM0_TRxPathEnable (Results 1 - 17 of 17) sorted by relevance
| /linux-4.1.27/drivers/staging/rtl8723au/hal/ |
| H A D | usb_halinit.c | 794 PHY_SetBBReg(Adapter, rOFDM0_TRxPathEnable, 0xf0, 1); phy_SsPwrSwitch92CU()
834 rtl8723au_read32(Adapter, rOFDM0_TRxPathEnable); phy_SsPwrSwitch92CU()
843 PHY_SetBBReg(Adapter, rOFDM0_TRxPathEnable, 0xf0, 0); phy_SsPwrSwitch92CU()
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| H A D | HalDMOutSrc8723A_CE.c | 743 rOFDM0_TRxPathEnable, rOFDM0_TRMuxPar, _PHY_IQCalibrate()
777 rtl8723au_write32(pAdapter, rOFDM0_TRxPathEnable, 0x03a05600); _PHY_IQCalibrate()
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| H A D | rtl8723a_phycfg.c | 643 PHY_SetBBReg(Adapter, rOFDM0_TRxPathEnable, bMaskByte0, 0x23); phy_BB8192C_Config_1T()
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| H A D | odm.c | 393 rtl8723au_read32(pDM_Odm->Adapter, rOFDM0_TRxPathEnable) & 0x0F; odm_CommonInfoSelfInit23a()
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| /linux-4.1.27/drivers/staging/rtl8188eu/hal/ |
| H A D | phy.c | 1088 rOFDM0_TRxPathEnable, rOFDM0_TRMuxPar, phy_iq_calibrate()
1122 phy_set_bb_reg(adapt, rOFDM0_TRxPathEnable, bMaskDWord, 0x03a05600); phy_iq_calibrate()
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| /linux-4.1.27/drivers/staging/rtl8192e/rtl8192e/ |
| H A D | r8192E_phy.c | 1415 rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable, 0xf, 0x0); PHY_SetRtl8192eRfOff()
1477 rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable, 0x3, SetRFPowerState8190()
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| H A D | r8192E_phyreg.h | 124 #define rOFDM0_TRxPathEnable 0xc04 macro
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| H A D | r819xE_phyreg.h | 119 #define rOFDM0_TRxPathEnable 0xc04 macro
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| H A D | rtl_dm.c | 2504 rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable, dm_rxpath_sel_byrssi()
2531 rOFDM0_TRxPathEnable, 0x1 << i, dm_rxpath_sel_byrssi()
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| /linux-4.1.27/drivers/staging/rtl8192u/ |
| H A D | r819xU_phyreg.h | 110 #define rOFDM0_TRxPathEnable 0xc04 macro
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| H A D | r819xU_phy.c | 1122 rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable, 0x3, 0x3); rtl8192_SetRFPowerState()
1147 rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable, 0xf, 0x0); rtl8192_SetRFPowerState()
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| H A D | r8192U_dm.c | 2616 rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable, 0x1<<min_rssi_index, 0x0); /* 0xc04[3:0] */ dm_rxpath_sel_byrssi()
2639 rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable, 0x1<<i, 0x1); /* 0xc04[3:0] */ dm_rxpath_sel_byrssi()
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| /linux-4.1.27/drivers/staging/rtl8712/ |
| H A D | rtl871x_mp.c | 482 set_bb_reg(pAdapter, rOFDM0_TRxPathEnable, 0x0000000f, r8712_SwitchAntenna()
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| H A D | rtl871x_mp_phy_regdef.h | 181 #define rOFDM0_TRxPathEnable 0xc04 macro
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| /linux-4.1.27/drivers/staging/rtl8723au/include/ |
| H A D | Hal8723APhyReg.h | 158 #define rOFDM0_TRxPathEnable 0xc04 macro
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| /linux-4.1.27/drivers/staging/rtl8188eu/include/ |
| H A D | Hal8188EPhyReg.h | 181 #define rOFDM0_TRxPathEnable 0xc04 macro
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| H A D | rtw_mp_phy_regdef.h | 201 #define rOFDM0_TRxPathEnable 0xc04 macro
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