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Searched refs:rFPGA0_XA_RFInterfaceOE (Results 1 – 16 of 16) sorted by relevance

/linux-4.1.27/drivers/staging/rtl8723au/hal/
Dodm.c1551 val32 = rtl8723au_read32(adapter, rFPGA0_XA_RFInterfaceOE); in ODM_SingleDualAntennaDetection()
1554 rtl8723au_write32(adapter, rFPGA0_XA_RFInterfaceOE, val32); in ODM_SingleDualAntennaDetection()
1632 val32 = rtl8723au_read32(adapter, rFPGA0_XA_RFInterfaceOE); in ODM_SingleDualAntennaDetection()
1635 rtl8723au_write32(adapter, rFPGA0_XA_RFInterfaceOE, val32); in ODM_SingleDualAntennaDetection()
1646 val32 = rtl8723au_read32(adapter, rFPGA0_XA_RFInterfaceOE); in ODM_SingleDualAntennaDetection()
1648 rtl8723au_write32(adapter, rFPGA0_XA_RFInterfaceOE, val32); in ODM_SingleDualAntennaDetection()
1662 val32 = rtl8723au_read32(adapter, rFPGA0_XA_RFInterfaceOE); in ODM_SingleDualAntennaDetection()
1665 rtl8723au_write32(adapter, rFPGA0_XA_RFInterfaceOE, val32); in ODM_SingleDualAntennaDetection()
Drtl8723a_phycfg.c463 pHalData->PHYRegDef[RF_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE; in phy_InitBBRFRegisterDefinition()
469 pHalData->PHYRegDef[RF_PATH_A].rfintfe = rFPGA0_XA_RFInterfaceOE; in phy_InitBBRFRegisterDefinition()
DHalDMOutSrc8723A_CE.c745 rFPGA0_XAB_RFInterfaceSW, rFPGA0_XA_RFInterfaceOE, in _PHY_IQCalibrate()
782 PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, BIT(10), 0x00); in _PHY_IQCalibrate()
Dusb_halinit.c623 rtl8723au_write32(Adapter, rFPGA0_XA_RFInterfaceOE, 0x66F60210); in rtl8723au_hal_init()
/linux-4.1.27/drivers/staging/rtl8188eu/hal/
Dbb_cfg.c620 reg[RF_PATH_A]->rfintfo = rFPGA0_XA_RFInterfaceOE; in rtl88e_phy_init_bb_rf_register_definition()
623 reg[RF_PATH_A]->rfintfe = rFPGA0_XA_RFInterfaceOE; in rtl88e_phy_init_bb_rf_register_definition()
Dphy.c1090 rFPGA0_XAB_RFInterfaceSW, rFPGA0_XA_RFInterfaceOE, in phy_iq_calibrate()
1128 phy_set_bb_reg(adapt, rFPGA0_XA_RFInterfaceOE, BIT10, 0x00); in phy_iq_calibrate()
Dusb_halinit.c638 if (phy_query_bb_reg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300) == Antenna_A) in _InitAntenna_Selection()
/linux-4.1.27/drivers/staging/rtl8192u/
Dr819xU_phy.c593 priv->PHYRegDef[RF90_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE; in rtl8192_InitBBRFRegDef()
603 priv->PHYRegDef[RF90_PATH_A].rfintfe = rFPGA0_XA_RFInterfaceOE; in rtl8192_InitBBRFRegDef()
1113 rtl8192_setBBreg(dev, rFPGA0_XA_RFInterfaceOE, BIT4, in rtl8192_SetRFPowerState()
1138 rtl8192_setBBreg(dev, rFPGA0_XA_RFInterfaceOE, BIT4, in rtl8192_SetRFPowerState()
Dr819xU_phyreg.h64 #define rFPGA0_XA_RFInterfaceOE 0x860 macro
/linux-4.1.27/drivers/staging/rtl8192e/rtl8192e/
Dr8192E_phy.c415 priv->PHYRegDef[RF90_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE; in rtl8192_InitBBRFRegDef()
420 priv->PHYRegDef[RF90_PATH_A].rfintfe = rFPGA0_XA_RFInterfaceOE; in rtl8192_InitBBRFRegDef()
1412 rtl8192_setBBreg(dev, rFPGA0_XA_RFInterfaceOE, BIT4, 0x0); in PHY_SetRtl8192eRfOff()
1471 rtl8192_setBBreg(dev, rFPGA0_XA_RFInterfaceOE, in SetRFPowerState8190()
Dr819xE_phyreg.h68 #define rFPGA0_XA_RFInterfaceOE 0x860 macro
Dr8192E_phyreg.h81 #define rFPGA0_XA_RFInterfaceOE 0x860 macro
/linux-4.1.27/drivers/staging/rtl8712/
Drtl871x_mp_phy_regdef.h110 #define rFPGA0_XA_RFInterfaceOE 0x860 /* RF Channel switch */ macro
/linux-4.1.27/drivers/staging/rtl8188eu/include/
DHal8188EPhyReg.h95 #define rFPGA0_XA_RFInterfaceOE 0x860 /* RF Channel switch */ macro
Drtw_mp_phy_regdef.h136 #define rFPGA0_XA_RFInterfaceOE 0x860 /* RF Channel switch */ macro
/linux-4.1.27/drivers/staging/rtl8723au/include/
DHal8723APhyReg.h86 #define rFPGA0_XA_RFInterfaceOE 0x860 /* RF Channel switch */ macro