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Searched refs:rFPGA0_TxInfo (Results 1 – 10 of 10) sorted by relevance

/linux-4.1.27/drivers/staging/rtl8192u/
Dr819xU_phyreg.h40 #define rFPGA0_TxInfo 0x804 macro
/linux-4.1.27/drivers/staging/rtl8192e/rtl8192e/
Dr819xE_phyreg.h45 #define rFPGA0_TxInfo 0x804 macro
Dr8192E_phyreg.h60 #define rFPGA0_TxInfo 0x804 macro
/linux-4.1.27/drivers/staging/rtl8712/
Drtl871x_mp_phy_regdef.h86 #define rFPGA0_TxInfo 0x804 /* Status report?? */ macro
Drtl871x_mp.c461 set_bb_reg(pAdapter, rFPGA0_TxInfo, 0x0000000f, ofdm_tx_en_val); in r8712_SwitchAntenna()
/linux-4.1.27/drivers/staging/rtl8188eu/include/
DHal8188EPhyReg.h73 #define rFPGA0_TxInfo 0x804 /* Status report?? */ macro
Drtw_mp_phy_regdef.h107 #define rFPGA0_TxInfo 0x804 /* Status report?? */ macro
/linux-4.1.27/drivers/staging/rtl8723au/include/
DHal8723APhyReg.h57 #define rFPGA0_TxInfo 0x804 /* Status report?? */ macro
/linux-4.1.27/drivers/staging/rtl8723au/hal/
Drtl8723a_phycfg.c637 PHY_SetBBReg(Adapter, rFPGA0_TxInfo, 0x3, 0x2); in phy_BB8192C_Config_1T()
Dusb_halinit.c619 rtl8723au_write32(Adapter, rFPGA0_TxInfo, 0x00000003); in rtl8723au_hal_init()