Searched refs:rFPGA0_AnalogParameter1 (Results 1 - 10 of 10) sorted by relevance
| /linux-4.1.27/drivers/staging/rtl8192e/rtl8192e/ |
| H A D | r8192E_phy.c | 596 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, bXtalCap92x, rtl8192_BB_Config_ParaFile()
1219 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x00100000, 1); rtl8192_SetBWModeWorkItem()
1239 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x00100000, 0); rtl8192_SetBWModeWorkItem()
1414 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x18, 0x0); PHY_SetRtl8192eRfOff()
1417 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x60, 0x0); PHY_SetRtl8192eRfOff()
1418 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x4, 0x0); PHY_SetRtl8192eRfOff()
1467 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, SetRFPowerState8190()
1475 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, SetRFPowerState8190()
1481 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, SetRFPowerState8190()
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| H A D | r8192E_phyreg.h | 89 #define rFPGA0_AnalogParameter1 0x880 macro
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| H A D | r819xE_phyreg.h | 76 #define rFPGA0_AnalogParameter1 0x880 macro
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| /linux-4.1.27/drivers/staging/rtl8192u/ |
| H A D | r819xU_phy.c | 833 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, bXtalCap, rtl8192_BB_Config_ParaFile()
1119 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x18, rtl8192_SetRFPowerState()
1126 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x60, rtl8192_SetRFPowerState()
1144 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x18, rtl8192_SetRFPowerState()
1151 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x60, rtl8192_SetRFPowerState()
1561 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, rtl8192_SetBWModeWorkItem()
1593 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x00100000, 0); rtl8192_SetBWModeWorkItem()
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| H A D | r819xU_phyreg.h | 72 #define rFPGA0_AnalogParameter1 0x880 macro
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| /linux-4.1.27/drivers/staging/rtl8712/ |
| H A D | rtl871x_mp_phy_regdef.h | 120 #define rFPGA0_AnalogParameter1 0x880 /* Crystal cap setting macro
512 /* Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ */
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| H A D | rtl871x_mp.c | 495 set_bb_reg(pAdapter, rFPGA0_AnalogParameter1, bXtalCap, r8712_SetCrystalCap()
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| /linux-4.1.27/drivers/staging/rtl8723au/include/ |
| H A D | Hal8723APhyReg.h | 98 #define rFPGA0_AnalogParameter1 0x880 /* Crystal cap setting RF-R/W protection for parameter4?? */ macro
540 #define bADClkPhase 0x4000000 /* Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ */
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| /linux-4.1.27/drivers/staging/rtl8188eu/include/ |
| H A D | Hal8188EPhyReg.h | 105 #define rFPGA0_AnalogParameter1 0x880 macro
607 /* Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ */
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| H A D | rtw_mp_phy_regdef.h | 147 #define rFPGA0_AnalogParameter1 0x880 /* Crystal cap setting RF-R/W protection for parameter4?? */ macro
556 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ */
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