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Searched refs:pmc_base (Results 1 – 12 of 12) sorted by relevance

/linux-4.1.27/arch/arm/mach-vt8500/
Dvt8500.c45 static void __iomem *pmc_base; variable
49 if (pmc_base) in vt8500_restart()
50 writel(1, pmc_base + VT8500_PMSR_REG); in vt8500_restart()
71 writew(5, pmc_base + VT8500_HCR_REG); in vt8500_power_off()
146 pmc_base = of_iomap(np, 0); in vt8500_init()
148 if (!pmc_base) in vt8500_init()
153 pmc_base = ioremap(LEGACY_PMC_BASE, 0x1000); in vt8500_init()
154 if (!pmc_base) in vt8500_init()
157 if (pmc_base) in vt8500_init()
/linux-4.1.27/drivers/clk/tegra/
Dclk-tegra-pmc.c82 void __init tegra_pmc_clk_init(void __iomem *pmc_base, in tegra_pmc_clk_init() argument
100 pmc_base + PMC_CLK_OUT_CNTRL, data->mux_shift, in tegra_pmc_clk_init()
110 0, pmc_base + PMC_CLK_OUT_CNTRL, in tegra_pmc_clk_init()
117 writel_relaxed(0, pmc_base + PMC_BLINK_TIMER); in tegra_pmc_clk_init()
119 pmc_base + PMC_DPD_PADS_ORIDE, in tegra_pmc_clk_init()
127 pmc_base + PMC_CTRL, in tegra_pmc_clk_init()
Dclk-tegra-super-gen4.c98 void __iomem *pmc_base, in tegra_super_clk_gen4_init() argument
136 pmc_base, CLK_IGNORE_UNUSED, params, NULL); in tegra_super_clk_gen4_init()
Dclk-tegra30.c175 static void __iomem *pmc_base; variable
928 clk = tegra_clk_register_pll("pll_c", "pll_ref", clk_base, pmc_base, 0, in tegra30_pll_init()
942 clk = tegra_clk_register_pll("pll_m", "pll_ref", clk_base, pmc_base, in tegra30_pll_init()
957 clk = tegra_clk_register_pll("pll_x", "pll_ref", clk_base, pmc_base, 0, in tegra30_pll_init()
967 clk = tegra_clk_register_pll("pll_u", "pll_ref", clk_base, pmc_base, 0, in tegra30_pll_init()
974 clk = tegra_clk_register_pll("pll_d", "pll_ref", clk_base, pmc_base, 0, in tegra30_pll_init()
984 clk = tegra_clk_register_pll("pll_d2", "pll_ref", clk_base, pmc_base, 0, in tegra30_pll_init()
998 clk = tegra_clk_register_plle("pll_e", "pll_e_mux", clk_base, pmc_base, in tegra30_pll_init()
1102 tegra_super_clk_gen4_init(clk_base, pmc_base, tegra30_clks, NULL); in tegra30_super_clk_init()
1197 tegra_periph_clk_init(clk_base, pmc_base, tegra30_clks, &pll_p_params); in tegra30_periph_clk_init()
[all …]
Dclk.h609 void __iomem *pmc_base, struct tegra_clk *tegra_clks,
612 void tegra_periph_clk_init(void __iomem *clk_base, void __iomem *pmc_base,
616 void tegra_pmc_clk_init(void __iomem *pmc_base, struct tegra_clk *tegra_clks);
623 void __iomem *pmc_base, struct tegra_clk *tegra_clks,
Dclk-tegra-audio.c128 void __iomem *pmc_base, struct tegra_clk *tegra_clks, in tegra_audio_clk_init() argument
139 pmc_base, 0, pll_a_params, NULL); in tegra_audio_clk_init()
Dclk-tegra114.c170 static void __iomem *pmc_base; variable
1170 void __iomem *pmc_base) in tegra114_periph_clk_init() argument
1222 tegra_periph_clk_init(clk_base, pmc_base, tegra114_clks, in tegra114_periph_clk_init()
1466 pmc_base = of_iomap(node, 0); in tegra114_clock_init()
1467 if (!pmc_base) { in tegra114_clock_init()
1484 tegra114_pll_init(clk_base, pmc_base); in tegra114_clock_init()
1485 tegra114_periph_clk_init(clk_base, pmc_base); in tegra114_clock_init()
1486 tegra_audio_clk_init(clk_base, pmc_base, tegra114_clks, &pll_a_params); in tegra114_clock_init()
1487 tegra_pmc_clk_init(pmc_base, tegra114_clks); in tegra114_clock_init()
1488 tegra_super_clk_gen4_init(clk_base, pmc_base, tegra114_clks, in tegra114_clock_init()
Dclk-tegra124.c133 static void __iomem *pmc_base; variable
1107 void __iomem *pmc_base) in tegra124_periph_clk_init() argument
1152 tegra_periph_clk_init(clk_base, pmc_base, tegra124_clks, &pll_p_params); in tegra124_periph_clk_init()
1472 pmc_base = of_iomap(node, 0); in tegra124_132_clock_init_pre()
1473 if (!pmc_base) { in tegra124_132_clock_init_pre()
1490 tegra124_pll_init(clk_base, pmc_base); in tegra124_132_clock_init_pre()
1491 tegra124_periph_clk_init(clk_base, pmc_base); in tegra124_132_clock_init_pre()
1492 tegra_audio_clk_init(clk_base, pmc_base, tegra124_clks, &pll_a_params); in tegra124_132_clock_init_pre()
1493 tegra_pmc_clk_init(pmc_base, tegra124_clks); in tegra124_132_clock_init_pre()
1513 tegra_super_clk_gen4_init(clk_base, pmc_base, tegra124_clks, in tegra124_132_clock_init_post()
Dclk-tegra20.c141 static void __iomem *pmc_base; variable
704 clk = tegra_clk_register_plle("pll_e", "pll_ref", clk_base, pmc_base, in tegra20_pll_init()
875 tegra_periph_clk_init(clk_base, pmc_base, tegra20_clks, &pll_p_params); in tegra20_periph_clk_init()
1108 pmc_base = of_iomap(node, 0); in tegra20_clock_init()
1109 if (!pmc_base) { in tegra20_clock_init()
1123 tegra_super_clk_gen4_init(clk_base, pmc_base, tegra20_clks, NULL); in tegra20_clock_init()
1126 tegra_pmc_clk_init(pmc_base, tegra20_clks); in tegra20_clock_init()
Dclk-tegra-periph.c637 static void __init init_pllp(void __iomem *clk_base, void __iomem *pmc_base, in init_pllp() argument
649 pmc_base, 0, pll_params, NULL); in init_pllp()
676 void __iomem *pmc_base, struct tegra_clk *tegra_clks, in tegra_periph_clk_init() argument
679 init_pllp(clk_base, pmc_base, tegra_clks, pll_params); in tegra_periph_clk_init()
/linux-4.1.27/drivers/clk/
Dclk-vt8500.c57 static void __iomem *pmc_base; variable
65 pmc_base = of_iomap(np, 0); in vtwm_set_pmc_base()
67 pmc_base = ioremap(LEGACY_PMC_BASE, 0x1000); in vtwm_set_pmc_base()
70 if (!pmc_base) in vtwm_set_pmc_base()
80 while (readl(pmc_base) & VT8500_PMC_BUSY_MASK) in vt8500_pmc_wait_busy()
243 if (!pmc_base) in vtwm_device_clk_init()
254 dev_clk->en_reg = pmc_base + en_reg; in vtwm_device_clk_init()
266 dev_clk->div_reg = pmc_base + div_reg; in vtwm_device_clk_init()
660 if (!pmc_base) in vtwm_pll_clk_init()
671 pll_clk->reg = pmc_base + reg; in vtwm_pll_clk_init()
/linux-4.1.27/arch/arm/mach-at91/
Dpm_suspend.S94 str r0, .pmc_base
113 ldr pmc, .pmc_base
142 ldr pmc, .pmc_base
151 ldr pmc, .pmc_base
315 .pmc_base: label