Searched refs:pll2_clk (Results 1 - 10 of 10) sorted by relevance

/linux-4.1.27/arch/arm/mach-davinci/
H A Ddm365.c162 static struct clk pll2_clk = { variable in typeref:struct:clk
171 .parent = &pll2_clk,
177 .parent = &pll2_clk,
183 .parent = &pll2_clk,
190 .parent = &pll2_clk,
197 .parent = &pll2_clk,
204 .parent = &pll2_clk,
211 .parent = &pll2_clk,
218 .parent = &pll2_clk,
225 .parent = &pll2_clk,
232 .parent = &pll2_clk,
239 .parent = &pll2_clk,
442 CLK(NULL, "pll2", &pll2_clk),
H A Ddm644x.c108 static struct clk pll2_clk = { variable in typeref:struct:clk
117 .parent = &pll2_clk,
124 .parent = &pll2_clk,
131 .parent = &pll2_clk,
296 CLK(NULL, "pll2", &pll2_clk),
H A Ddm646x.c151 static struct clk pll2_clk = { variable in typeref:struct:clk
152 .name = "pll2_clk",
160 .parent = &pll2_clk,
336 CLK(NULL, "pll2", &pll2_clk),
H A Ddm355.c141 static struct clk pll2_clk = { variable in typeref:struct:clk
150 .parent = &pll2_clk,
157 .parent = &pll2_clk,
353 CLK(NULL, "pll2", &pll2_clk),
/linux-4.1.27/arch/arm/mach-shmobile/
H A Dclock-sh73a0.c132 static struct clk pll2_clk = { variable in typeref:struct:clk
177 &pll2_clk,
361 [1] = &pll2_clk,
371 [1] = &pll2_clk,
377 [1] = &pll2_clk,
383 [1] = &pll2_clk,
390 [1] = &pll2_clk,
/linux-4.1.27/drivers/clk/spear/
H A Dspear6xx_clock.c107 "pll2_clk", };
145 clk = clk_register_vco_pll("vco2_clk", "pll2_clk", NULL, "osc_30m_clk", spear6xx_clk_init()
149 clk_register_clkdev(clk1, "pll2_clk", NULL); spear6xx_clk_init()
H A Dspear1340_clock.c419 "pll1_clk", "sys_syn_clk", "sys_syn_clk", "pll2_clk", "pll3_clk", };
427 static const char *gmac_phy_input_parents[] = { "gmii_pad_clk", "pll2_clk",
430 static const char *clcd_synth_parents[] = { "vco1div4_clk", "pll2_clk", };
432 static const char *i2s_src_parents[] = { "vco1div2_clk", "pll2_clk", "pll3_clk",
436 static const char *spdif_in_parents[] = { "pll2_clk", "gen_syn3_clk", };
441 "pll2_clk", };
491 clk = clk_register_vco_pll("vco2_clk", "pll2_clk", NULL, "vco2_mclk", 0, spear1340_clk_init()
495 clk_register_clkdev(clk1, "pll2_clk", NULL); spear1340_clk_init()
H A Dspear3xx_clock.c136 static const char *gen2_3_parents[] = { "pll1_clk", "pll2_clk", };
138 "pll2_clk", };
422 clk = clk_register_vco_pll("vco2_clk", "pll2_clk", NULL, spear3xx_clk_init()
426 clk_register_clkdev(clk1, "pll2_clk", NULL); spear3xx_clk_init()
635 clk = clk_register_gate(NULL, "ras_pll2_clk", "pll2_clk", 0, spear3xx_clk_init()
H A Dspear1310_clock.c363 static const char *gmac_phy_input_parents[] = { "gmii_pad_clk", "pll2_clk",
366 static const char *clcd_synth_parents[] = { "vco1div4_clk", "pll2_clk", };
374 "pll2_clk", };
434 clk = clk_register_vco_pll("vco2_clk", "pll2_clk", NULL, "vco2_mclk", spear1310_clk_init()
438 clk_register_clkdev(clk1, "pll2_clk", NULL); spear1310_clk_init()
862 clk = clk_register_gate(NULL, "ras_pll2_clk", "pll2_clk", 0, spear1310_clk_init()
/linux-4.1.27/drivers/cpufreq/
H A Dspear-cpufreq.c45 "pll2_clk", spear1340_cpu_get_possible_parent()

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