Searched refs:pipe_src_w (Results 1 – 7 of 7) sorted by relevance
113 if (adjusted_mode->hdisplay == pipe_config->pipe_src_w && in intel_pch_panel_fitting()119 width = pipe_config->pipe_src_w; in intel_pch_panel_fitting()130 u32 scaled_height = pipe_config->pipe_src_w in intel_pch_panel_fitting()140 height = scaled_width / pipe_config->pipe_src_w; in intel_pch_panel_fitting()233 u32 scaled_height = pipe_config->pipe_src_w * in i965_scale_aspect()243 else if (adjusted_mode->hdisplay != pipe_config->pipe_src_w) in i965_scale_aspect()254 u32 scaled_height = pipe_config->pipe_src_w * in i9xx_scale_aspect()282 pipe_config->pipe_src_w); in i9xx_scale_aspect()285 if (pipe_config->pipe_src_w != adjusted_mode->hdisplay) { in i9xx_scale_aspect()286 bits = panel_fitter_scaling(pipe_config->pipe_src_w, in i9xx_scale_aspect()[all …]
147 intel_crtc->active ? intel_crtc->config->pipe_src_w : 0; in intel_plane_atomic_check()
566 if (intel_crtc->config->pipe_src_w > max_width || in intel_fbc_update()
2708 (intel_crtc->config->pipe_src_w - 1)); in i9xx_update_primary_plane()2713 (intel_crtc->config->pipe_src_w - 1)); in i9xx_update_primary_plane()2771 x += (intel_crtc->config->pipe_src_w - 1); in i9xx_update_primary_plane()2778 (intel_crtc->config->pipe_src_w - 1) * pixel_size; in i9xx_update_primary_plane()2871 x += (intel_crtc->config->pipe_src_w - 1); in ironlake_update_primary_plane()2878 (intel_crtc->config->pipe_src_w - 1) * pixel_size; in ironlake_update_primary_plane()3025 (intel_crtc->config->pipe_src_w - 1)); in skylake_update_primary_plane()3233 crtc->config->pipe_src_w = adjusted_mode->crtc_hdisplay; in intel_update_pipe_size()5852 pipe_config->pipe_src_w &= ~1; in intel_crtc_compute_config()6653 ((intel_crtc->config->pipe_src_w - 1) << 16) | in intel_set_pipe_timings()[all …]
730 hdisplay = to_intel_crtc(crtc)->config->pipe_src_w; in g4x_compute_wm0()817 hdisplay = to_intel_crtc(crtc)->config->pipe_src_w; in g4x_compute_srwm()1200 int hdisplay = to_intel_crtc(crtc)->config->pipe_src_w; in i965_update_wm()1348 int hdisplay = to_intel_crtc(enabled)->config->pipe_src_w; in i9xx_update_wm()1429 pipe_w = intel_crtc->config->pipe_src_w; in ilk_pipe_pixel_rate()2062 p->pri.horiz_pixels = intel_crtc->config->pipe_src_w; in ilk_compute_wm_parameters()2839 p->plane[0].horiz_pixels = intel_crtc->config->pipe_src_w; in skl_compute_wm_pipe_parameters()
283 int pipe_src_w, pipe_src_h; member
2680 yesno(crtc->active), crtc->config->pipe_src_w, in i915_display_info()