| /linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/core/ |
| H A D | gpuobj.c | 42 nvkm_mm_free(&nv_gpuobj(gpuobj->parent)->heap, &gpuobj->node); nvkm_gpuobj_destroy()
67 if (nv_gpuobj(pargpu)->heap.block_size) nvkm_gpuobj_create_()
77 addr = nv_gpuobj(pargpu)->addr; nvkm_gpuobj_create_()
78 heap = &nv_gpuobj(pargpu)->heap; nvkm_gpuobj_create_()
164 nvkm_gpuobj_destroy(nv_gpuobj(object)); _nvkm_gpuobj_dtor()
170 return nvkm_gpuobj_init(nv_gpuobj(object)); _nvkm_gpuobj_init()
176 return nvkm_gpuobj_fini(nv_gpuobj(object), suspend); _nvkm_gpuobj_fini()
182 struct nvkm_gpuobj *gpuobj = nv_gpuobj(object); _nvkm_gpuobj_rd32()
192 struct nvkm_gpuobj *gpuobj = nv_gpuobj(object); _nvkm_gpuobj_wr32()
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| H A D | namedb.c | 61 if (nv_gpuobj(handle->object)->addr == vinst) nvkm_namedb_lookup_vinst()
76 if (nv_gpuobj(handle->object)->node && nvkm_namedb_lookup_cinst()
77 nv_gpuobj(handle->object)->node->offset == cinst) nvkm_namedb_lookup_cinst()
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| H A D | ramht.c | 59 if (co >= nv_gpuobj(ramht)->size) nvkm_ramht_insert()
104 ramht->bits = order_base_2(nv_gpuobj(ramht)->size >> 3); nvkm_ramht_new()
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| /linux-4.1.27/drivers/gpu/drm/nouveau/include/nvkm/core/ |
| H A D | gpuobj.h | 24 nv_gpuobj(void *obj) nv_gpuobj() function
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| /linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/engine/fifo/ |
| H A D | g84.c | 67 nv_engctx(ectx)->addr = nv_gpuobj(base)->addr >> 12; g84_fifo_context_attach()
107 nv_wr32(priv, 0x0032fc, nv_gpuobj(base)->addr >> 12); g84_fifo_context_detach()
135 context = nv_gpuobj(object)->node->offset >> 4; g84_fifo_object_attach()
229 nv_wo32(base->ramfc, 0x98, nv_gpuobj(base)->addr >> 12); g84_fifo_chan_ctor_dma()
304 nv_wo32(base->ramfc, 0x98, nv_gpuobj(base)->addr >> 12); g84_fifo_chan_ctor_ind()
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| H A D | nv40.c | 77 context = nv_gpuobj(object)->addr >> 4; nv40_fifo_object_attach()
128 nv_engctx(engctx)->addr = nv_gpuobj(engctx)->addr >> 4; nv40_fifo_context_attach()
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| H A D | nv50.c | 89 nv_engctx(ectx)->addr = nv_gpuobj(base)->addr >> 12; nv50_fifo_context_attach()
135 nv_wr32(priv, 0x0032fc, nv_gpuobj(base)->addr >> 12); nv50_fifo_context_detach()
165 context = nv_gpuobj(object)->node->offset >> 4; nv50_fifo_object_attach()
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| H A D | gk104.c | 143 nv_engctx(ectx)->addr = nv_gpuobj(base)->addr >> 12; gk104_fifo_context_attach()
154 ret = nvkm_gpuobj_map_vm(nv_gpuobj(ectx), base->vm, gk104_fifo_context_attach()
159 nv_engctx(ectx)->addr = nv_gpuobj(base)->addr >> 12; gk104_fifo_context_attach()
288 struct nvkm_gpuobj *base = nv_gpuobj(object->parent); gk104_fifo_chan_init()
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| H A D | gf100.c | 130 ret = nvkm_gpuobj_map_vm(nv_gpuobj(ectx), base->vm, gf100_fifo_context_attach()
135 nv_engctx(ectx)->addr = nv_gpuobj(base)->addr >> 12; gf100_fifo_context_attach()
253 struct nvkm_gpuobj *base = nv_gpuobj(object->parent); gf100_fifo_chan_init()
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| H A D | nv04.c | 64 context = nv_gpuobj(object)->addr >> 4; nv04_fifo_object_attach()
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| /linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/engine/sw/ |
| H A D | nv50.c | 52 struct nvkm_gpuobj *gpuobj = nv_gpuobj(handle->object); nv50_sw_mthd_dma_vblsem()
183 chan->vblank.channel = nv_gpuobj(parent->parent)->addr >> 12; nv50_sw_context_ctor()
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| /linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/engine/gr/ |
| H A D | nv40.c | 150 nv40_grctx_fill(nv_device(priv), nv_gpuobj(chan)); nv40_gr_context_ctor()
151 nv_wo32(chan, 0x00000, nv_gpuobj(chan)->addr >> 4); nv40_gr_context_ctor()
160 u32 inst = 0x01000000 | nv_gpuobj(chan)->addr >> 4; nv40_gr_context_fini()
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| H A D | nv20.c | 113 nv_wo32(priv->ctxtab, chan->chid * 4, nv_gpuobj(chan)->addr >> 4); nv20_gr_context_init()
128 nv_wr32(priv, 0x400784, nv_gpuobj(chan)->addr >> 4); nv20_gr_context_fini()
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| H A D | nv50.c | 156 nv50_grctx_fill(nv_device(priv), nv_gpuobj(chan)); nv50_gr_context_ctor()
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| H A D | gf100.c | 303 ret = nvkm_gpuobj_map_vm(nv_gpuobj(chan->mmio), vm, gf100_gr_context_ctor()
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| /linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/engine/mpeg/ |
| H A D | nv44.c | 67 u32 inst = 0x80000000 | nv_gpuobj(chan)->addr >> 4; nv44_mpeg_context_fini()
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| /linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/engine/disp/ |
| H A D | gf110.c | 79 u32 addr = nv_gpuobj(object)->node->offset; gf110_disp_dmac_object_attach()
707 nv_wr32(priv, 0x610010, (nv_gpuobj(object->parent)->addr >> 8) | 9); gf110_disp_main_init()
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| H A D | nv50.c | 192 u32 addr = nv_gpuobj(object)->node->offset; nv50_disp_dmac_object_attach()
1192 nv_wr32(priv, 0x610010, (nv_gpuobj(base->ramht)->addr >> 8) | 9); nv50_disp_main_init()
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