Searched refs:musb_writew (Results 1 - 13 of 13) sorted by relevance

/linux-4.1.27/drivers/usb/musb/
H A Dmusb_gadget.c208 musb_writew(epio, MUSB_TXCSR, nuke()
210 musb_writew(epio, MUSB_TXCSR, nuke()
213 musb_writew(epio, MUSB_RXCSR, nuke()
215 musb_writew(epio, MUSB_RXCSR, nuke()
337 musb_writew(epio, MUSB_TXCSR, csr txstate()
364 musb_writew(epio, MUSB_TXCSR, csr); txstate()
374 musb_writew(epio, MUSB_TXCSR, (MUSB_TXCSR_P_WZC_BITS & txstate()
402 musb_writew(epio, MUSB_TXCSR, csr); txstate()
426 musb_writew(epio, MUSB_TXCSR, csr); txstate()
468 musb_writew(epio, MUSB_TXCSR, csr); musb_g_tx()
476 musb_writew(epio, MUSB_TXCSR, csr); musb_g_tx()
498 musb_writew(epio, MUSB_TXCSR, csr); musb_g_tx()
527 musb_writew(epio, MUSB_TXCSR, MUSB_TXCSR_MODE musb_g_tx()
620 musb_writew(epio, MUSB_RXCSR, csr); rxstate()
674 musb_writew(epio, MUSB_RXCSR, csr); rxstate()
676 musb_writew(epio, MUSB_RXCSR, csr); rxstate()
683 musb_writew(epio, MUSB_RXCSR, rxstate()
685 musb_writew(epio, MUSB_RXCSR, csr); rxstate()
697 musb_writew(epio, MUSB_RXCSR, csr); rxstate()
744 musb_writew(epio, MUSB_RXCSR, csr); rxstate()
752 musb_writew(epio, MUSB_RXCSR, csr); rxstate()
803 musb_writew(epio, MUSB_RXCSR, csr); rxstate()
817 musb_writew(epio, MUSB_RXCSR, csr); rxstate()
863 musb_writew(epio, MUSB_RXCSR, csr); musb_g_rx()
870 musb_writew(epio, MUSB_RXCSR, csr); musb_g_rx()
892 musb_writew(epio, MUSB_RXCSR, musb_g_rx()
910 musb_writew(epio, MUSB_RXCSR, csr); musb_g_rx()
1027 musb_writew(mbase, MUSB_INTRTXE, musb->intrtxe); musb_gadget_enable()
1036 musb_writew(regs, MUSB_TXMAXP, hw_ep->max_packet_sz_tx); musb_gadget_enable()
1041 musb_writew(regs, MUSB_TXMAXP, musb_ep->packet_sz musb_gadget_enable()
1053 musb_writew(regs, MUSB_TXCSR, csr); musb_gadget_enable()
1055 musb_writew(regs, MUSB_TXCSR, csr); musb_gadget_enable()
1070 musb_writew(mbase, MUSB_INTRRXE, musb->intrrxe); musb_gadget_enable()
1079 musb_writew(regs, MUSB_RXMAXP, hw_ep->max_packet_sz_tx); musb_gadget_enable()
1081 musb_writew(regs, MUSB_RXMAXP, musb_ep->packet_sz musb_gadget_enable()
1088 musb_writew(regs, MUSB_TXCSR, csr); musb_gadget_enable()
1098 musb_writew(regs, MUSB_RXCSR, csr); musb_gadget_enable()
1099 musb_writew(regs, MUSB_RXCSR, csr); musb_gadget_enable()
1159 musb_writew(musb->mregs, MUSB_INTRTXE, musb->intrtxe); musb_gadget_disable()
1160 musb_writew(epio, MUSB_TXMAXP, 0); musb_gadget_disable()
1163 musb_writew(musb->mregs, MUSB_INTRRXE, musb->intrrxe); musb_gadget_disable()
1164 musb_writew(epio, MUSB_RXMAXP, 0); musb_gadget_disable()
1409 musb_writew(epio, MUSB_TXCSR, csr); musb_gadget_set_halt()
1420 musb_writew(epio, MUSB_RXCSR, csr); musb_gadget_set_halt()
1488 musb_writew(mbase, MUSB_INTRTXE, musb->intrtxe & ~(1 << epnum)); musb_gadget_fifo_flush()
1500 musb_writew(epio, MUSB_TXCSR, csr); musb_gadget_fifo_flush()
1502 musb_writew(epio, MUSB_TXCSR, csr); musb_gadget_fifo_flush()
1507 musb_writew(epio, MUSB_RXCSR, csr); musb_gadget_fifo_flush()
1508 musb_writew(epio, MUSB_RXCSR, csr); musb_gadget_fifo_flush()
1512 musb_writew(mbase, MUSB_INTRTXE, musb->intrtxe); musb_gadget_fifo_flush()
H A Dmusbhsdma.h91 musb_writew(mbase, musb_write_hsdma_addr()
94 musb_writew(mbase, musb_write_hsdma_addr()
115 musb_writew(mbase, musb_write_hsdma_count()
117 musb_writew(mbase, musb_write_hsdma_count()
H A Dmusbhsdma.c142 musb_writew(mbase, configure_channel()
215 musb_writew(mbase, offset, csr); dma_channel_abort()
217 musb_writew(mbase, offset, csr); dma_channel_abort()
226 musb_writew(mbase, offset, csr); dma_channel_abort()
229 musb_writew(mbase, dma_channel_abort()
342 musb_writew(mbase, offset, txcsr); dma_controller_irq()
346 musb_writew(mbase, offset, txcsr); dma_controller_irq()
H A Dmusb_host.c124 musb_writew(epio, MUSB_TXCSR, csr); musb_h_tx_flush_fifo()
145 musb_writew(epio, MUSB_TXCSR, MUSB_CSR0_FLUSHFIFO); musb_h_ep0_flush_fifo()
154 musb_writew(epio, MUSB_TXCSR, 0); musb_h_ep0_flush_fifo()
169 musb_writew(ep->regs, MUSB_TXCSR, txcsr); musb_h_tx_start()
172 musb_writew(ep->regs, MUSB_CSR0, txcsr); musb_h_tx_start()
186 musb_writew(ep->regs, MUSB_TXCSR, txcsr); musb_h_tx_dma_start()
446 musb_writew(hw_ep->regs, MUSB_RXCSR, csr); musb_h_flush_rxfifo()
447 musb_writew(hw_ep->regs, MUSB_RXCSR, csr); musb_h_flush_rxfifo()
543 musb_writew(epio, MUSB_RXCSR, csr); musb_host_packet_rx()
573 musb_writew(ep->regs, MUSB_TXCSR, musb_rx_reinit()
582 musb_writew(ep->regs, MUSB_TXCSR, MUSB_TXCSR_DMAMODE); musb_rx_reinit()
583 musb_writew(ep->regs, MUSB_TXCSR, 0); musb_rx_reinit()
612 musb_writew(ep->regs, MUSB_RXMAXP, ep->max_packet_sz_rx); musb_rx_reinit()
614 musb_writew(ep->regs, MUSB_RXMAXP, musb_rx_reinit()
657 musb_writew(epio, MUSB_TXCSR, csr); musb_tx_dma_program()
686 musb_writew(epio, MUSB_TXCSR, csr | MUSB_TXCSR_H_WZC_BITS); musb_tx_dma_program()
725 musb_writew(epio, MUSB_TXCSR, csr); musb_ep_program()
756 musb_writew(mbase, MUSB_INTRTXE, int_txe & ~(1 << epnum)); musb_ep_program()
792 musb_writew(epio, MUSB_TXCSR, csr); musb_ep_program()
795 musb_writew(epio, MUSB_TXCSR, csr); musb_ep_program()
815 musb_writew(epio, MUSB_TXMAXP, musb_ep_program()
820 musb_writew(epio, MUSB_TXMAXP, packet_sz musb_ep_program()
823 musb_writew(epio, MUSB_TXMAXP, musb_ep_program()
871 musb_writew(mbase, MUSB_INTRTXE, int_txe); musb_ep_program()
910 musb_writew(hw_ep->regs, MUSB_RXCSR, csr); musb_ep_program()
931 musb_writew(hw_ep->regs, MUSB_RXCSR, csr); musb_ep_program()
957 musb_writew(epio, MUSB_RXCSR, rx_csr); musb_bulk_nak_timeout()
967 musb_writew(epio, MUSB_TXCSR, tx_csr); musb_bulk_nak_timeout()
1134 musb_writew(epio, MUSB_CSR0, 0); musb_h_ep0_irq()
1148 musb_writew(epio, MUSB_CSR0, csr); musb_h_ep0_irq()
1150 musb_writew(epio, MUSB_CSR0, csr); musb_h_ep0_irq()
1158 musb_writew(epio, MUSB_CSR0, 0); musb_h_ep0_irq()
1195 musb_writew(epio, MUSB_CSR0, csr); musb_h_ep0_irq()
1287 musb_writew(epio, MUSB_TXCSR, musb_host_tx()
1313 musb_writew(epio, MUSB_TXCSR, tx_csr); musb_host_tx()
1315 musb_writew(epio, MUSB_TXCSR, tx_csr); musb_host_tx()
1357 musb_writew(epio, MUSB_TXCSR, musb_host_tx()
1362 musb_writew(epio, MUSB_TXCSR, musb_host_tx()
1497 musb_writew(epio, MUSB_TXCSR, musb_host_tx()
1624 musb_writew(epio, MUSB_RXCSR, rx_csr); musb_host_rx()
1684 musb_writew(epio, MUSB_RXCSR, musb_host_rx()
1695 musb_writew(hw_ep->regs, MUSB_RXCSR, val); musb_host_rx()
1728 musb_writew(hw_ep->regs, MUSB_RXCSR, val); musb_host_rx()
1747 musb_writew(epio, MUSB_RXCSR, musb_host_rx()
1770 musb_writew(epio, MUSB_RXCSR, val); musb_host_rx()
1872 musb_writew(epio, MUSB_RXCSR, musb_host_rx()
1891 musb_writew(epio, MUSB_RXCSR, val); musb_host_rx()
2306 musb_writew(epio, MUSB_TXCSR, csr); musb_cleanup_urb()
2308 musb_writew(epio, MUSB_TXCSR, csr); musb_cleanup_urb()
H A Dmusb_cppi41.c98 musb_writew(cppi41_channel->hw_ep->regs, MUSB_RXCSR, csr); update_rx_toggle()
146 musb_writew(epio, MUSB_TXCSR, csr); cppi41_trans_done()
182 musb_writew(epio, MUSB_RXCSR, csr); cppi41_trans_done()
550 musb_writew(epio, MUSB_TXCSR, csr); cppi41_dma_channel_abort()
556 musb_writew(epio, MUSB_RXCSR, csr); cppi41_dma_channel_abort()
564 musb_writew(epio, MUSB_RXCSR, csr); cppi41_dma_channel_abort()
565 musb_writew(epio, MUSB_RXCSR, csr); cppi41_dma_channel_abort()
585 musb_writew(epio, MUSB_TXCSR, csr); cppi41_dma_channel_abort()
H A Dmusb_gadget_ep0.c293 musb_writew(regs, MUSB_TXCSR, csr);
300 musb_writew(regs, MUSB_RXCSR, csr);
452 musb_writew(regs, MUSB_TXCSR, csr);
459 musb_writew(regs, MUSB_RXCSR, csr);
533 musb_writew(regs, MUSB_CSR0, csr); ep0_rxstate()
590 musb_writew(regs, MUSB_CSR0, csr); ep0_txstate()
638 musb_writew(regs, MUSB_CSR0, MUSB_CSR0_P_SVDRXPKTRDY); musb_read_setup()
691 musb_writew(regs, MUSB_CSR0, musb_g_ep0_irq()
700 musb_writew(regs, MUSB_CSR0, MUSB_CSR0_P_SVDSETUPEND); musb_g_ep0_irq()
888 musb_writew(regs, MUSB_CSR0, musb_g_ep0_irq()
905 musb_writew(regs, MUSB_CSR0, MUSB_CSR0_P_SENDSTALL); musb_g_ep0_irq()
989 musb_writew(regs, MUSB_CSR0, musb_g_ep0_queue()
1000 musb_writew(regs, MUSB_CSR0, musb->ackpend); musb_g_ep0_queue()
1061 musb_writew(regs, MUSB_CSR0, csr); musb_g_ep0_halt()
H A Dblackfin.c83 musb_writew(epio, MUSB_TXCOUNT, len); bfin_write_fifo()
217 musb_writew(musb->mregs, MUSB_INTRTX, musb->int_tx); blackfin_interrupt()
218 musb_writew(musb->mregs, MUSB_INTRRX, musb->int_rx); blackfin_interrupt()
249 musb_writew(musb->mregs, MUSB_DEVCTL, val); musb_conn_timer_handler()
251 musb_writew(musb->mregs, MUSB_DEVCTL, val); musb_conn_timer_handler()
278 musb_writew(musb->mregs, MUSB_DEVCTL, val); musb_conn_timer_handler()
H A Dmusb_core.c312 musb_writew(fifo, 0, *(u16 *)&src[index]); musb_default_write_fifo()
383 void (*musb_writew)(void __iomem *addr, unsigned offset, u16 data); variable
384 EXPORT_SYMBOL_GPL(musb_writew); variable
434 musb_writew(regs, MUSB_CSR0, MUSB_CSR0_TXPKTRDY); musb_load_testpacket()
767 musb_writew(musb->mregs, MUSB_INTRTXE, musb->intrtxe); musb_stage0_irq()
769 musb_writew(musb->mregs, MUSB_INTRRXE, musb->intrrxe); musb_stage0_irq()
977 musb_writew(mbase, MUSB_INTRTXE, 0); musb_disable_interrupts()
979 musb_writew(mbase, MUSB_INTRRXE, 0); musb_disable_interrupts()
993 musb_writew(regs, MUSB_INTRTXE, musb->intrtxe); musb_enable_interrupts()
995 musb_writew(regs, MUSB_INTRRXE, musb->intrrxe); musb_enable_interrupts()
1990 musb_writew = musb_default_writew; musb_init_controller()
2056 musb_writew = musb->ops->writew; musb_init_controller()
2342 musb_writew(musb_base, MUSB_FRAME, musb->context.frame); musb_restore_context()
2353 musb_writew(musb_base, MUSB_INTRTXE, musb->intrtxe); musb_restore_context()
2354 musb_writew(musb_base, MUSB_INTRRXE, musb->intrrxe); musb_restore_context()
2370 musb_writew(epio, MUSB_TXMAXP, musb_restore_context()
2372 musb_writew(epio, MUSB_TXCSR, musb_restore_context()
2374 musb_writew(epio, MUSB_RXMAXP, musb_restore_context()
2376 musb_writew(epio, MUSB_RXCSR, musb_restore_context()
H A Dmusb_io.h64 extern void (*musb_writew)(void __iomem *addr, unsigned offset, u16 data);
H A Dux500_dma.c239 musb_writew(epio, MUSB_TXCSR, csr); ux500_dma_channel_abort()
245 musb_writew(epio, MUSB_RXCSR, csr); ux500_dma_channel_abort()
H A Dtusb6010_omap.c201 musb_writew(hw_ep->regs, MUSB_TXCSR, csr); tusb_omap_dma_cb()
377 musb_writew(hw_ep->regs, MUSB_TXCSR, csr); tusb_omap_dma_program()
383 musb_writew(hw_ep->regs, MUSB_RXCSR, tusb_omap_dma_program()
H A Dmusb_regs.h313 musb_writew(mbase, MUSB_TXFIFOADD, c_off); musb_write_txfifoadd()
323 musb_writew(mbase, MUSB_RXFIFOADD, c_off); musb_write_rxfifoadd()
H A Dcppi_dma.c501 musb_writew(regs, MUSB_RXCSR, val); cppi_autoreq_update()
1129 musb_writew(regs, MUSB_RXCSR, cppi_rx_scan()
1440 musb_writew(regs, MUSB_TXCSR, value); cppi_channel_abort()
1441 musb_writew(regs, MUSB_TXCSR, value); cppi_channel_abort()
1487 musb_writew(regs, MUSB_RXCSR, csr); cppi_channel_abort()

Completed in 235 milliseconds