Searched refs:mmc_dev (Results 1 - 40 of 40) sorted by relevance

/linux-4.1.27/drivers/mmc/host/
H A Dusdhi6rol0.c208 dev_vdbg(mmc_dev(host->mmc), "%s(0x%p + 0x%x) = 0x%x\n", __func__, usdhi6_write()
215 dev_vdbg(mmc_dev(host->mmc), "%s(0x%p + 0x%x) = 0x%x\n", __func__, usdhi6_write16()
222 dev_vdbg(mmc_dev(host->mmc), "%s(0x%p + 0x%x) = 0x%x\n", __func__, usdhi6_read()
230 dev_vdbg(mmc_dev(host->mmc), "%s(0x%p + 0x%x) = 0x%x\n", __func__, usdhi6_read16()
282 dev_dbg(mmc_dev(host->mmc), usdhi6_error_code()
286 dev_warn(mmc_dev(host->mmc), usdhi6_error_code()
294 dev_warn(mmc_dev(host->mmc), "Err sts 0x%x, state %u, CMD%d\n", usdhi6_error_code()
316 dev_dbg(mmc_dev(host->mmc), "%s(): CMD%u of %u SG: %ux%u @ 0x%x\n", usdhi6_blk_bounce()
383 dev_dbg(mmc_dev(host->mmc), "Mapped %p (%lx) at %p + %u for CMD%u @ 0x%p\n", usdhi6_sg_map()
462 dev_dbg(mmc_dev(host->mmc), "%s(): %zu of %zu @ %zu\n", __func__, usdhi6_sg_advance()
506 dev_dbg(mmc_dev(host->mmc), "Mapped %p (%lx) at %p for CMD%u @ 0x%p\n", usdhi6_sg_advance()
552 dev_name(mmc_dev(host->mmc)), mrq)) usdhi6_dma_complete()
555 dev_dbg(mmc_dev(host->mmc), "%s(): CMD%u DMA completed\n", __func__, usdhi6_dma_complete()
596 dev_dbg(mmc_dev(host->mmc), "%s(): mapped %d -> %d, cookie %d @ %p\n", usdhi6_dma_setup()
604 dev_warn(mmc_dev(host->mmc), usdhi6_dma_setup()
626 dev_dbg(mmc_dev(host->mmc), "%s(): SG of %u: %ux%u\n", usdhi6_dma_kill()
639 dev_dbg(mmc_dev(host->mmc), "%s(): IO error %d, status 0x%x\n", usdhi6_dma_check_error()
647 dev_warn(mmc_dev(host->mmc), usdhi6_dma_check_error()
658 dev_warn(mmc_dev(host->mmc), "Unexpected response received!\n"); usdhi6_dma_check_error()
677 host->chan_tx = dma_request_slave_channel(mmc_dev(host->mmc), "tx"); usdhi6_dma_request()
678 dev_dbg(mmc_dev(host->mmc), "%s: TX: got channel %p\n", __func__, usdhi6_dma_request()
692 host->chan_rx = dma_request_slave_channel(mmc_dev(host->mmc), "rx"); usdhi6_dma_request()
693 dev_dbg(mmc_dev(host->mmc), "%s: RX: got channel %p\n", __func__, usdhi6_dma_request()
732 dev_err(mmc_dev(host->mmc), "SD bus busy, clock set aborted\n"); usdhi6_clk_set()
761 dev_dbg(mmc_dev(host->mmc), "target %lu, div %u, set %lu\n", usdhi6_clk_set()
816 dev_dbg(mmc_dev(mmc), "%uHz, OCR: %u, power %u, bus-width %u, timing %u\n", usdhi6_set_ios()
831 dev_err(mmc_dev(mmc), "Cannot reset the interface!\n"); usdhi6_set_ios()
846 dev_err(mmc_dev(mmc), usdhi6_set_ios()
885 dev_dbg(mmc_dev(host->mmc), "Set %s timeout %lu ticks @ %lu Hz\n", usdhi6_timeout_set()
909 dev_dbg(mmc_dev(host->mmc), "%s(CMD%d: %ux%u): err %d %d %d\n", usdhi6_request_done()
967 dev_warn(mmc_dev(host->mmc), usdhi6_cmd_flags()
995 dev_dbg(mmc_dev(host->mmc), "Command active, request aborted\n"); usdhi6_rq_start()
1026 dev_warn(mmc_dev(host->mmc), "%s(): %u blocks of %u bytes\n", usdhi6_rq_start()
1043 dev_dbg(mmc_dev(host->mmc), usdhi6_rq_start()
1055 dev_dbg(mmc_dev(host->mmc), usdhi6_rq_start()
1062 dev_dbg(mmc_dev(host->mmc), "%s(): request opcode %u\n", usdhi6_rq_start()
1137 dev_dbg(mmc_dev(mmc), "%s(): %sable\n", __func__, enable ? "en" : "dis"); usdhi6_enable_sdio_irq()
1190 dev_err(mmc_dev(host->mmc), usdhi6_resp_read()
1209 dev_dbg(mmc_dev(host->mmc), "Response 0x%x\n", rsp[0]); usdhi6_resp_read()
1247 dev_dbg(mmc_dev(host->mmc), "%s(): %d\n", __func__, data->error); usdhi6_blk_read()
1290 dev_dbg(mmc_dev(host->mmc), "%s(): %d\n", __func__, data->error); usdhi6_blk_write()
1308 dev_err(mmc_dev(host->mmc), usdhi6_stop_cmd()
1470 dev_warn(mmc_dev(host->mmc), "%s(): %d\n", __func__, ret); usdhi6_sd_bh()
1479 dev_warn(mmc_dev(host->mmc), "%s(): %d\n", __func__, usdhi6_sd_bh()
1485 dev_err(mmc_dev(host->mmc), "Invalid state %u\n", host->wait); usdhi6_sd_bh()
1517 dev_warn(mmc_dev(host->mmc), "%s(): data error %d\n", usdhi6_sd_bh()
1542 dev_dbg(mmc_dev(host->mmc), usdhi6_sd()
1571 dev_warn(mmc_dev(host->mmc), usdhi6_sd()
1575 dev_dbg(mmc_dev(host->mmc), usdhi6_sd()
1588 dev_dbg(mmc_dev(host->mmc), "%s(): status 0x%x\n", __func__, status); usdhi6_sdio()
1638 dev_warn(mmc_dev(host->mmc), usdhi6_timeout_work()
1652 dev_err(mmc_dev(host->mmc), "Invalid state %u\n", host->wait); usdhi6_timeout_work()
1668 dev_dbg(mmc_dev(host->mmc), usdhi6_timeout_work()
H A Dbfin_sdh.c121 dev_dbg(mmc_dev(host->mmc), "%s enter flags: 0x%x\n", __func__, data->flags); sdh_setup_data()
158 host->dma_len = dma_map_sg(mmc_dev(host->mmc), data->sg, data->sg_len, host->dma_dir); sdh_setup_data()
174 dev_dbg(mmc_dev(host->mmc), "%d: start_addr:0x%lx, " sdh_setup_data()
206 dev_dbg(mmc_dev(host->mmc), "%s exit\n", __func__); sdh_setup_data()
215 dev_dbg(mmc_dev(host->mmc), "%s enter cmd: 0x%p\n", __func__, cmd); sdh_start_cmd()
246 dev_dbg(mmc_dev(host->mmc), "%s enter\n", __func__); sdh_finish_request()
258 dev_dbg(mmc_dev(host->mmc), "%s enter cmd: %p\n", __func__, cmd); sdh_cmd_done()
297 dev_dbg(mmc_dev(host->mmc), "%s enter stat: 0x%x\n", __func__, stat); sdh_data_done()
302 dma_unmap_sg(mmc_dev(host->mmc), data->sg, data->sg_len, sdh_data_done()
338 dev_dbg(mmc_dev(host->mmc), "%s enter, mrp:%p, cmd:%p\n", __func__, mrq, mrq->cmd); sdh_request()
450 dev_dbg(mmc_dev(host->mmc), "SDH: clk_div = 0x%x actual clock:%ld expected clock:%d\n", sdh_set_ios()
465 dev_dbg(mmc_dev(host->mmc), "%s enter, irq_stat: 0x%04lx\n", __func__, sdh_dma_irq()
479 dev_dbg(mmc_dev(host->mmc), "%s enter\n", __func__); sdh_stat_irq()
502 dev_dbg(mmc_dev(host->mmc), "%s exit\n\n", __func__); sdh_stat_irq()
H A Ddavinci_mmc.c288 dev_dbg(mmc_dev(host->mmc), "CMD%d, arg 0x%08x%s\n", mmc_davinci_start_command()
329 dev_dbg(mmc_dev(host->mmc), "unknown resp_type %04x\n", mmc_davinci_start_command()
442 dev_dbg(mmc_dev(host->mmc), mmc_davinci_send_dma_request()
464 dev_dbg(mmc_dev(host->mmc), mmc_davinci_send_dma_request()
485 host->sg_len = dma_map_sg(mmc_dev(host->mmc), data->sg, data->sg_len, mmc_davinci_start_dma_transfer()
493 dma_unmap_sg(mmc_dev(host->mmc), mmc_davinci_start_dma_transfer()
528 &host->txdma, mmc_dev(host->mmc), "tx"); davinci_acquire_dma_channels()
530 dev_err(mmc_dev(host->mmc), "Can't get dma_tx channel\n"); davinci_acquire_dma_channels()
536 &host->rxdma, mmc_dev(host->mmc), "rx"); davinci_acquire_dma_channels()
538 dev_err(mmc_dev(host->mmc), "Can't get dma_rx channel\n"); davinci_acquire_dma_channels()
571 dev_dbg(mmc_dev(host->mmc), "%s %s, %d blocks of %d bytes\n", mmc_davinci_prepare_data()
575 dev_dbg(mmc_dev(host->mmc), " DTO %d cycles + %d ns\n", mmc_davinci_prepare_data()
644 dev_err(mmc_dev(host->mmc), "still BUSY? bad ... \n"); mmc_davinci_request()
735 dev_dbg(mmc_dev(host->mmc), mmc_davinci_set_ios()
753 dev_dbg(mmc_dev(host->mmc), "Enabling 8 bit mode\n"); mmc_davinci_set_ios()
759 dev_dbg(mmc_dev(host->mmc), "Enabling 4 bit mode\n"); mmc_davinci_set_ios()
770 dev_dbg(mmc_dev(host->mmc), "Enabling 1 bit mode\n"); mmc_davinci_set_ios()
802 dev_warn(mmc_dev(host->mmc), "powerup timeout\n"); mmc_davinci_set_ios()
829 dma_unmap_sg(mmc_dev(host->mmc), data->sg, data->sg_len, mmc_davinci_xfer_done()
901 dev_dbg(mmc_dev(host->mmc), mmc_davinci_sdio_irq()
919 dev_dbg(mmc_dev(host->mmc), mmc_davinci_irq()
977 dev_err(mmc_dev(host->mmc), mmc_davinci_irq()
987 dev_dbg(mmc_dev(host->mmc), mmc_davinci_irq()
1011 dev_dbg(mmc_dev(host->mmc), "data %s %s error\n", mmc_davinci_irq()
1021 dev_dbg(mmc_dev(host->mmc), mmc_davinci_irq()
1035 dev_dbg(mmc_dev(host->mmc), "Command CRC error\n"); mmc_davinci_irq()
1343 dev_dbg(mmc_dev(host->mmc), "max_segs=%d\n", mmc->max_segs); davinci_mmcsd_probe()
1344 dev_dbg(mmc_dev(host->mmc), "max_blk_size=%d\n", mmc->max_blk_size); davinci_mmcsd_probe()
1345 dev_dbg(mmc_dev(host->mmc), "max_req_size=%d\n", mmc->max_req_size); davinci_mmcsd_probe()
1346 dev_dbg(mmc_dev(host->mmc), "max_seg_size=%d\n", mmc->max_seg_size); davinci_mmcsd_probe()
1373 dev_info(mmc_dev(host->mmc), "Using %s, %d-bit mode\n", davinci_mmcsd_probe()
H A Dmmci.c229 pm_runtime_get_sync(mmc_dev(mmc)); mmci_card_busy()
236 pm_runtime_mark_last_busy(mmc_dev(mmc)); mmci_card_busy()
237 pm_runtime_put_autosuspend(mmc_dev(mmc)); mmci_card_busy()
252 dev_err(mmc_dev(host->mmc), mmci_validate_data()
385 pm_runtime_mark_last_busy(mmc_dev(host->mmc)); mmci_request_end()
386 pm_runtime_put_autosuspend(mmc_dev(host->mmc)); mmci_request_end()
435 host->dma_rx_channel = dma_request_slave_channel(mmc_dev(host->mmc), "rx"); mmci_dma_setup()
436 host->dma_tx_channel = dma_request_slave_channel(mmc_dev(host->mmc), "tx"); mmci_dma_setup()
459 dev_info(mmc_dev(host->mmc), "DMA channels RX %s, TX %s\n", mmci_dma_setup()
501 dev_err(mmc_dev(host->mmc), "error during DMA transfer!\n"); mmci_dma_data_error()
557 dev_err(mmc_dev(host->mmc), "buggy DMA detected. Taking evasive action.\n"); mmci_dma_finalize()
658 dev_vdbg(mmc_dev(host->mmc), mmci_dma_start_data()
790 dev_dbg(mmc_dev(host->mmc), "blksz %04x blks %04x flags %08x\n", mmci_start_data()
882 dev_dbg(mmc_dev(host->mmc), "op %02x arg %08x flags %08x\n", mmci_start_command()
937 dev_dbg(mmc_dev(host->mmc), "MCI ERROR IRQ, status 0x%08x at 0x%08x\n", mmci_data_irq()
960 dev_err(mmc_dev(host->mmc), "stray MCI_DATABLOCKEND interrupt\n"); mmci_data_irq()
1163 dev_dbg(mmc_dev(host->mmc), "irq1 (pio) %08x\n", status); mmci_pio_irq()
1258 dev_dbg(mmc_dev(host->mmc), "irq0 (data+cmd) %08x\n", status); mmci_irq()
1293 pm_runtime_get_sync(mmc_dev(mmc)); mmci_request()
1321 pm_runtime_get_sync(mmc_dev(mmc)); mmci_set_ios()
1324 host->plat->ios_handler(mmc_dev(mmc), ios)) mmci_set_ios()
1325 dev_err(mmc_dev(mmc), "platform ios_handler failed\n"); mmci_set_ios()
1354 dev_err(mmc_dev(mmc), mmci_set_ios()
1403 dev_err(mmc_dev(host->mmc), mmci_set_ios()
1418 pm_runtime_mark_last_busy(mmc_dev(mmc)); mmci_set_ios()
1419 pm_runtime_put_autosuspend(mmc_dev(mmc)); mmci_set_ios()
1432 status = plat->status(mmc_dev(host->mmc)); mmci_get_cd()
1443 pm_runtime_get_sync(mmc_dev(mmc)); mmci_sig_volt_switch()
1461 dev_warn(mmc_dev(mmc), "Voltage switch failed\n"); mmci_sig_volt_switch()
1463 pm_runtime_mark_last_busy(mmc_dev(mmc)); mmci_sig_volt_switch()
1464 pm_runtime_put_autosuspend(mmc_dev(mmc)); mmci_sig_volt_switch()
1544 dev_dbg(mmc_dev(mmc), "designer ID = 0x%02x\n", host->hw_designer); mmci_probe()
1545 dev_dbg(mmc_dev(mmc), "revision = 0x%01x\n", host->hw_revision); mmci_probe()
1575 dev_dbg(mmc_dev(mmc), "eventual mclk rate: %u Hz\n", mmci_probe()
1613 dev_dbg(mmc_dev(mmc), "clocking block at %u Hz\n", mmc->f_max); mmci_probe()
1623 dev_warn(mmc_dev(mmc), "Platform OCR mask is ignored\n"); mmci_probe()
H A Dsdhci-sirf.c69 dev_dbg(mmc_dev(mmc), "%s: Found good phase = %d\n", sdhci_sirf_execute_tuning()
79 dev_dbg(mmc_dev(mmc), "%s: Found bad phase = %d\n", sdhci_sirf_execute_tuning()
100 dev_dbg(mmc_dev(mmc), "%s: Setting the tuning phase to %d\n", sdhci_sirf_execute_tuning()
106 dev_dbg(mmc_dev(mmc), "%s: No tuning point found\n", sdhci_sirf_execute_tuning()
H A Dmxcmmc.c253 host->pdata->setpower(mmc_dev(host->mmc), vdd); mxcmci_set_power()
265 dev_dbg(mmc_dev(host->mmc), "mxcmci_softreset\n"); mxcmci_softreset()
377 dev_dbg(mmc_dev(host->mmc), "%s: 0x%08x\n", __func__, stat); mxcmci_dma_callback()
405 dev_err(mmc_dev(host->mmc), "unhandled response type 0x%x\n", mxcmci_start_cmd()
466 dev_dbg(mmc_dev(host->mmc), "request failed. status: 0x%08x\n", mxcmci_finish_data()
469 dev_err(mmc_dev(host->mmc), "%s: -EILSEQ\n", __func__); mxcmci_finish_data()
474 dev_err(mmc_dev(host->mmc), mxcmci_finish_data()
478 dev_err(mmc_dev(host->mmc), mxcmci_finish_data()
483 dev_err(mmc_dev(host->mmc), mxcmci_finish_data()
487 dev_err(mmc_dev(host->mmc), "%s: -EIO\n", __func__); mxcmci_finish_data()
511 dev_dbg(mmc_dev(host->mmc), "CMD TIMEOUT\n"); mxcmci_read_response()
514 dev_dbg(mmc_dev(host->mmc), "cmd crc error\n"); mxcmci_read_response()
736 dev_dbg(mmc_dev(host->mmc), "%s: 0x%08x\n", __func__, stat); mxcmci_irq()
829 dev_dbg(mmc_dev(host->mmc), "scaler: %d divider: %d in: %d out: %d\n", mxcmci_set_clk_rate()
867 dev_err(mmc_dev(host->mmc), mxcmci_set_ios()
902 dev_dbg(mmc_dev(mmc), "%s\n", __func__); mxcmci_detect_irq()
913 return !!host->pdata->get_ro(mmc_dev(mmc)); mxcmci_get_ro()
979 dev_err(mmc_dev(host->mmc), mxcmci_watchdog()
983 dev_err(mmc_dev(host->mmc), mxcmci_watchdog()
1116 dev_err(mmc_dev(host->mmc), "wrong rev.no. 0x%08x. aborting.\n", mxcmci_probe()
1147 dev_info(mmc_dev(host->mmc), "dma not available. Using PIO\n"); mxcmci_probe()
H A Dsunxi-mmc.c261 dev_err(mmc_dev(host->mmc), "fatal err reset timeout\n"); sunxi_mmc_reset_host()
339 dma_len = dma_map_sg(mmc_dev(host->mmc), data->sg, data->sg_len, sunxi_mmc_map_dma()
342 dev_err(mmc_dev(host->mmc), "dma_map_sg failed\n"); sunxi_mmc_map_dma()
348 dev_err(mmc_dev(host->mmc), sunxi_mmc_map_dma()
407 dev_err(mmc_dev(host->mmc), "send stop command failed\n"); sunxi_mmc_send_manual_stop()
429 dev_err(mmc_dev(host->mmc), sunxi_mmc_dump_errinfo()
490 dma_unmap_sg(mmc_dev(host->mmc), data->sg, data->sg_len, sunxi_mmc_finalize_request()
517 dev_dbg(mmc_dev(host->mmc), "irq: rq %p mi %08x idi %08x\n", sunxi_mmc_irq()
571 dev_err(mmc_dev(host->mmc), "no request for manual stop\n"); sunxi_mmc_handle_manual_stop()
575 dev_err(mmc_dev(host->mmc), "data error, sending stop command\n"); sunxi_mmc_handle_manual_stop()
621 dev_err(mmc_dev(host->mmc), "fatal err update clk timeout\n"); sunxi_mmc_oclk_onoff()
635 dev_dbg(mmc_dev(host->mmc), "setting clk to %d, rounded %d\n", sunxi_mmc_clk_set_rate()
641 dev_err(mmc_dev(host->mmc), "error setting clk to %d: %d\n", sunxi_mmc_clk_set_rate()
703 dev_dbg(mmc_dev(mmc), "power on!\n"); sunxi_mmc_set_ios()
707 dev_dbg(mmc_dev(mmc), "power off!\n"); sunxi_mmc_set_ios()
791 dev_err(mmc_dev(mmc), "map DMA failed\n"); sunxi_mmc_request()
837 dev_dbg(mmc_dev(mmc), "cmd %d(%08x) arg %x ie 0x%08x len %d\n", sunxi_mmc_request()
847 dma_unmap_sg(mmc_dev(mmc), data->sg, data->sg_len, sunxi_mmc_request()
850 dev_err(mmc_dev(mmc), "request already pending\n"); sunxi_mmc_request()
H A Dsdhci-msm.c79 dev_err(mmc_dev(mmc), "%s: CK_OUT_EN bit is not %d\n", msm_dll_poll_ck_out_en()
140 dev_err(mmc_dev(mmc), "%s: Failed to set DLL phase: %d\n", msm_config_cm_dll_phase()
169 dev_err(mmc_dev(mmc), "%s: Invalid argument: total_phases=%d\n", msm_find_most_appropriate_phase()
252 dev_err(mmc_dev(mmc), "%s: Invalid phase selected=%d\n", msm_find_most_appropriate_phase()
334 dev_err(mmc_dev(mmc), "%s: DLL failed to LOCK\n", msm_init_cm_dll()
380 dev_dbg(mmc_dev(mmc), "%s: Found good phase = %d\n", sdhci_msm_execute_tuning()
400 dev_dbg(mmc_dev(mmc), "%s: Setting the tuning phase to %d\n", sdhci_msm_execute_tuning()
406 dev_dbg(mmc_dev(mmc), "%s: No tuning point found\n", sdhci_msm_execute_tuning()
H A Domap.c223 host->pdata->switch_slot(mmc_dev(slot->mmc), slot->id); mmc_omap_select_slot()
304 return slot->pdata->get_cover_state(mmc_dev(slot->mmc), mmc_omap_cover_is_open()
363 dev_err(mmc_dev(host->mmc), "Invalid response type: %04x\n", mmc_resp_type(cmd)); mmc_omap_start_command()
409 struct device *dev = mmc_dev(host->mmc); mmc_omap_release_dma()
603 dev_dbg(mmc_dev(host->mmc), "Aborting stuck command CMD%d\n", mmc_omap_abort_command()
713 dev_vdbg(mmc_dev(host->mmc), "%s\n", res); mmc_omap_report_irq()
732 dev_info(mmc_dev(host->slots[0]->mmc), mmc_omap_irq()
754 dev_dbg(mmc_dev(host->mmc), "MMC IRQ %04x (CMD %d): ", mmc_omap_irq()
770 dev_dbg(mmc_dev(host->mmc), "data timeout (CMD%d)\n", mmc_omap_irq()
781 dev_dbg(mmc_dev(host->mmc), mmc_omap_irq()
786 dev_dbg(mmc_dev(host->mmc), "data CRC error\n"); mmc_omap_irq()
797 dev_err(mmc_dev(host->mmc), mmc_omap_irq()
808 dev_err(mmc_dev(host->mmc), mmc_omap_irq()
815 dev_err(mmc_dev(host->mmc), mmc_omap_irq()
820 dev_dbg(mmc_dev(host->mmc), mmc_omap_irq()
1110 slot->pdata->set_power(mmc_dev(slot->mmc), slot->id, power_on, mmc_omap_set_power()
1185 slot->pdata->set_bus_mode(mmc_dev(mmc), slot->id, mmc_omap_set_ios()
H A Dsdhci-cns3xxx.c28 struct device *dev = mmc_dev(host->mmc); sdhci_cns3xxx_set_clock()
H A Dtmio_mmc_pio.c135 pm_runtime_get_sync(mmc_dev(mmc)); tmio_mmc_enable_sdio_irq()
148 pm_runtime_mark_last_busy(mmc_dev(mmc)); tmio_mmc_enable_sdio_irq()
149 pm_runtime_put_autosuspend(mmc_dev(mmc)); tmio_mmc_enable_sdio_irq()
263 pm_runtime_mark_last_busy(mmc_dev(host->mmc)); tmio_mmc_reset_work()
264 pm_runtime_put_autosuspend(mmc_dev(host->mmc)); tmio_mmc_reset_work()
295 pm_runtime_mark_last_busy(mmc_dev(host->mmc)); tmio_mmc_finish_request()
296 pm_runtime_put_autosuspend(mmc_dev(host->mmc)); tmio_mmc_finish_request()
810 pm_runtime_get_sync(mmc_dev(mmc)); tmio_mmc_request()
831 pm_runtime_mark_last_busy(mmc_dev(mmc)); tmio_mmc_request()
832 pm_runtime_put_autosuspend(mmc_dev(mmc)); tmio_mmc_request()
923 pm_runtime_get_sync(mmc_dev(mmc)); tmio_mmc_set_ios()
982 pm_runtime_mark_last_busy(mmc_dev(mmc)); tmio_mmc_set_ios()
983 pm_runtime_put_autosuspend(mmc_dev(mmc)); tmio_mmc_set_ios()
994 pm_runtime_get_sync(mmc_dev(mmc)); tmio_mmc_get_ro()
997 pm_runtime_mark_last_busy(mmc_dev(mmc)); tmio_mmc_get_ro()
998 pm_runtime_put_autosuspend(mmc_dev(mmc)); tmio_mmc_get_ro()
H A Dmxs-mmc.c157 dma_unmap_sg(mmc_dev(host->mmc), data->sg, mxs_mmc_request_done()
235 dma_map_sg(mmc_dev(host->mmc), data->sg, mxs_mmc_prep_dma()
252 dma_unmap_sg(mmc_dev(host->mmc), data->sg, mxs_mmc_prep_dma()
289 dev_warn(mmc_dev(host->mmc), mxs_mmc_bc()
331 dev_warn(mmc_dev(host->mmc), mxs_mmc_ac()
461 dev_warn(mmc_dev(host->mmc), mxs_mmc_adtc()
484 dev_warn(mmc_dev(host->mmc), mxs_mmc_start_cmd()
634 dev_err(mmc_dev(host->mmc), mxs_mmc_probe()
675 dev_info(mmc_dev(host->mmc), "initialized\n"); mxs_mmc_probe()
H A Dpxamci.c86 host->vcc = regulator_get_optional(mmc_dev(host->mmc), "vmmc"); pxamci_init_ocr()
93 dev_warn(mmc_dev(host->mmc), pxamci_init_ocr()
131 return host->pdata->setpower(mmc_dev(host->mmc), vdd); pxamci_set_power()
152 dev_err(mmc_dev(host->mmc), "unable to stop clock\n"); pxamci_stop_clock()
212 host->dma_len = dma_map_sg(mmc_dev(host->mmc), data->sg, data->sg_len, pxamci_setup_data()
362 dma_unmap_sg(mmc_dev(host->mmc), data->sg, data->sg_len, pxamci_data_done()
460 return !!host->pdata->get_ro(mmc_dev(mmc)); pxamci_get_ro()
515 dev_err(mmc_dev(mmc), "unable to set power\n"); pxamci_set_ios()
534 dev_dbg(mmc_dev(mmc), "PXAMCI: clkrt = %x cmdat = %x\n", pxamci_set_ios()
H A Dcb710-mmc.h32 struct platform_device *pdev = container_of(mmc_dev(mmc), cb710_mmc_to_slot()
H A Dsdhci-tegra.c270 dev_err(mmc_dev(host->mmc), "failed to allocate tegra_host\n"); sdhci_tegra_probe()
288 clk = devm_clk_get(mmc_dev(host->mmc), NULL); sdhci_tegra_probe()
290 dev_err(mmc_dev(host->mmc), "clk err\n"); sdhci_tegra_probe()
H A Dandroid-goldfish.c180 dev_err(mmc_dev(host->mmc), goldfish_mmc_start_command()
229 dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->sg_len, goldfish_mmc_xfer_done()
356 dev_info(mmc_dev(host->mmc),"spurious irq 0x%04x\n", status); goldfish_mmc_irq()
398 host->sg_len = dma_map_sg(mmc_dev(host->mmc), data->sg, goldfish_mmc_prepare_data()
523 dev_warn(mmc_dev(host->mmc), goldfish_mmc_probe()
H A Dsdhci-pxav3.c179 struct platform_device *pdev = to_platform_device(mmc_dev(host->mmc)); pxav3_reset()
212 dev_dbg(mmc_dev(host->mmc), pxav3_gen_init_74_clocks()
241 dev_warn(mmc_dev(host->mmc), "74 clock interrupt not cleared\n"); pxav3_gen_init_74_clocks()
303 dev_dbg(mmc_dev(host->mmc), pxav3_set_uhs_signaling()
441 dev_err(mmc_dev(host->mmc), sdhci_pxav3_probe()
H A Domap_hsmmc.c470 dev_dbg(mmc_dev(host->mmc), "MMC Clock is not stopped\n"); omap_hsmmc_stop_clock()
533 dev_vdbg(mmc_dev(host->mmc), "Set clock to %uHz\n", ios->clock); omap_hsmmc_set_clock()
680 dev_dbg(mmc_dev(host->mmc), "context is restored: restore count %d\n", omap_hsmmc_context_restore()
785 dev_vdbg(mmc_dev(host->mmc), "%s: CMD%d, argument 0x%08x\n", omap_hsmmc_start_command()
989 dev_vdbg(mmc_dev(host->mmc), "%s\n", res); omap_hsmmc_dbg_report_irq()
1030 dev_err(mmc_dev(host->mmc), omap_hsmmc_reset_controller_fsm()
1058 dev_vdbg(mmc_dev(host->mmc), "IRQ Status is %x\n", status); omap_hsmmc_do_irq()
1086 dev_dbg(mmc_dev(host->mmc), "AC12 err: 0x%x\n", ac12); omap_hsmmc_do_irq()
1208 dev_err(mmc_dev(host->mmc), "Unable to switch operating voltage\n"); omap_hsmmc_switch_opcond()
1372 dev_err(mmc_dev(host->mmc), "prep_slave_sg() failed\n"); omap_hsmmc_setup_dma_transfer()
1463 dev_err(mmc_dev(host->mmc), "MMC start dma failure\n"); omap_hsmmc_prepare_data()
1599 dev_dbg(mmc_dev(host->mmc), omap_hsmmc_set_ios()
1686 dev_err(mmc_dev(host->mmc), "Unable to request wake IRQ\n"); omap_hsmmc_configure_wake_irq()
2024 dev_warn(mmc_dev(host->mmc), "Failed to enable debounce clk\n"); omap_hsmmc_probe()
2054 dev_err(mmc_dev(host->mmc), "cannot get DMA TX channel\n"); omap_hsmmc_probe()
2062 dev_err(mmc_dev(host->mmc), "cannot get DMA RX channel\n"); omap_hsmmc_probe()
2077 dev_err(mmc_dev(host->mmc), "unable to obtain RX DMA engine channel %u\n", rx_req); omap_hsmmc_probe()
2087 dev_err(mmc_dev(host->mmc), "unable to obtain TX DMA engine channel %u\n", tx_req); omap_hsmmc_probe()
2096 dev_err(mmc_dev(host->mmc), "Unable to grab HSMMC IRQ\n"); omap_hsmmc_probe()
H A Dsdhci-esdhc-imx.c623 dev_dbg(mmc_dev(host->mmc), "desired SD clock: %d, actual: %d\n", esdhc_pltfm_set_clock()
698 dev_dbg(mmc_dev(host->mmc), esdhc_prepare_tuning()
742 dev_dbg(mmc_dev(host->mmc), "tunning %s at 0x%x ret %d\n", esdhc_executing_tuning()
755 dev_dbg(mmc_dev(host->mmc), "change pinctrl state for uhs %d\n", uhs); esdhc_change_pinstate()
987 dev_warn(mmc_dev(host->mmc), "could not get default state\n"); sdhci_esdhc_imx_probe()
1018 dev_err(mmc_dev(host->mmc), "no board data!\n"); sdhci_esdhc_imx_probe()
1030 dev_err(mmc_dev(host->mmc), sdhci_esdhc_imx_probe()
1044 dev_err(mmc_dev(host->mmc), sdhci_esdhc_imx_probe()
1085 dev_warn(mmc_dev(host->mmc), sdhci_esdhc_imx_probe()
H A Dsdhci-bcm-kona.c167 dev_dbg(mmc_dev(host->mmc), sdhci_bcm_kona_card_event()
171 dev_dbg(mmc_dev(host->mmc), sdhci_bcm_kona_card_event()
H A Dsdhci.c506 host->align_addr = dma_map_single(mmc_dev(host->mmc), sdhci_adma_table_pre()
508 if (dma_mapping_error(mmc_dev(host->mmc), host->align_addr)) sdhci_adma_table_pre()
593 dma_sync_single_for_device(mmc_dev(host->mmc), sdhci_adma_table_pre()
600 dma_unmap_single(mmc_dev(host->mmc), host->align_addr, sdhci_adma_table_pre()
623 dma_unmap_single(mmc_dev(host->mmc), host->align_addr, sdhci_adma_table_post()
635 dma_sync_sg_for_cpu(mmc_dev(host->mmc), data->sg, sdhci_adma_table_post()
655 dma_unmap_sg(mmc_dev(host->mmc), data->sg, sdhci_adma_table_post()
982 dma_unmap_sg(mmc_dev(host->mmc), sdhci_finish_data()
2153 dma_unmap_sg(mmc_dev(host->mmc), data->sg, data->sg_len, sdhci_post_req()
2172 sg_count = dma_map_sg(mmc_dev(host->mmc), data->sg, data->sg_len, sdhci_pre_dma_transfer()
2737 if (!device_may_wakeup(mmc_dev(host->mmc))) { sdhci_suspend_host()
2760 if (!device_may_wakeup(mmc_dev(host->mmc))) { sdhci_resume_host()
3034 host->adma_table = dma_alloc_coherent(mmc_dev(mmc), sdhci_add_host()
3041 dma_free_coherent(mmc_dev(mmc), sdhci_add_host()
3055 dma_free_coherent(mmc_dev(mmc), host->adma_table_sz, sdhci_add_host()
3070 mmc_dev(mmc)->dma_mask = &host->dma_mask; sdhci_add_host()
3443 ret = led_classdev_register(mmc_dev(mmc), &host->led); sdhci_add_host()
3456 mmc_hostname(mmc), host->hw_name, dev_name(mmc_dev(mmc)), sdhci_add_host()
3524 dma_free_coherent(mmc_dev(mmc), host->adma_table_sz, sdhci_remove_host()
H A Dmoxart-mmc.c198 dev_err(mmc_dev(host->mmc), "timed out waiting for status\n"); moxart_wait_for_status()
286 dev_err(mmc_dev(host->mmc), "dma_map_sg returned zero length\n"); moxart_transfer_dma()
442 dev_err(mmc_dev(host->mmc), "card removed\n"); moxart_request()
H A Dwmt-sdmmc.c306 dma_unmap_sg(mmc_dev(priv->mmc), req->data->sg, wmt_complete_data_request()
309 dma_unmap_sg(mmc_dev(priv->mmc), req->data->sg, wmt_complete_data_request()
623 sg_cnt = dma_map_sg(mmc_dev(mmc), req->data->sg, wmt_mci_request()
629 sg_cnt = dma_map_sg(mmc_dev(mmc), req->data->sg, wmt_mci_request()
H A Dsdhci-st.c307 dev_warn(mmc_dev(host->mmc), "Error setting dll for clock " sdhci_st_set_uhs_signaling()
310 dev_dbg(mmc_dev(host->mmc), "uhs %d, ctrl_2 %04X\n", uhs, ctrl_2); sdhci_st_set_uhs_signaling()
H A Djz4740_mmc.c183 dev_err(mmc_dev(host->mmc), "Failed to get dma_tx channel\n"); jz4740_mmc_acquire_dma_channels()
189 dev_err(mmc_dev(host->mmc), "Failed to get dma_rx channel\n"); jz4740_mmc_acquire_dma_channels()
235 dev_warn(mmc_dev(host->mmc), jz4740_mmc_prepare_dma_data()
256 dev_err(mmc_dev(host->mmc), jz4740_mmc_prepare_dma_data()
306 dev_err(mmc_dev(host->mmc), jz4740_mmc_start_dma_transfer()
H A Dau1xmmc.c353 dma_unmap_sg(mmc_dev(host->mmc), data->sg, data->sg_len, host->dma.dir); au1xmmc_data_complete()
630 host->dma.len = dma_map_sg(mmc_dev(host->mmc), data->sg, au1xmmc_prepare_data()
682 dma_unmap_sg(mmc_dev(host->mmc), data->sg, data->sg_len, au1xmmc_prepare_data()
1075 ret = led_classdev_register(mmc_dev(mmc), led); au1xmmc_probe()
H A Dsdhci-bcm2835.c162 dev_err(mmc_dev(host->mmc), bcm2835_sdhci_probe()
H A Dsdhci-pxav2.c56 struct platform_device *pdev = to_platform_device(mmc_dev(host->mmc)); pxav2_reset()
H A Dmvsdio.c133 host->sg_frags = dma_map_sg(mmc_dev(host->mmc), data->sg, mvsd_setup_data()
299 dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->sg_frags, mvsd_finish_data()
H A Dsdhci-of-esdhc.c230 dev_dbg(mmc_dev(host->mmc), "desired SD clock: %d, actual: %d\n", esdhc_of_set_clock()
H A Dwbsd.c1396 host->dma_addr = dma_map_single(mmc_dev(host->mmc), host->dma_buffer, wbsd_request_dma()
1420 dma_unmap_single(mmc_dev(host->mmc), host->dma_addr, wbsd_request_dma()
1438 dma_unmap_single(mmc_dev(host->mmc), host->dma_addr, wbsd_release_dma()
H A Dvia-sdmmc.c493 count = dma_map_sg(mmc_dev(host->mmc), data->sg, data->sg_len, via_sdc_preparedata()
637 dma_unmap_sg(mmc_dev(host->mmc), data->sg, data->sg_len, via_sdc_finish_data()
H A Ds3cmci.c1107 dma_map_sg(mmc_dev(host->mmc), data->sg, data->sg_len, s3cmci_prepare_dma()
1124 dma_unmap_sg(mmc_dev(host->mmc), data->sg, data->sg_len, s3cmci_prepare_dma()
H A Drtsx_usb_sdmmc.c1390 err = led_classdev_register(mmc_dev(mmc), &host->led); rtsx_usb_sdmmc_drv_probe()
H A Dsh_mmcif.c1375 dev_warn(mmc_dev(mmc), "Platform OCR mask is ignored\n"); sh_mmcif_init_ocr()
/linux-4.1.27/drivers/mmc/card/
H A Dqueue.c199 if (mmc_dev(host)->dma_mask && *mmc_dev(host)->dma_mask) mmc_init_queue()
200 limit = (u64)dma_max_pfn(mmc_dev(host)) << PAGE_SHIFT; mmc_init_queue()
H A Dblock.c563 dev_err(mmc_dev(card->host), "%s: cmd error %d\n", mmc_blk_ioctl_cmd()
569 dev_err(mmc_dev(card->host), "%s: data error %d\n", mmc_blk_ioctl_cmd()
602 dev_err(mmc_dev(card->host), mmc_blk_ioctl_cmd()
/linux-4.1.27/drivers/mmc/core/
H A Dcore.c930 pm_runtime_get_sync(mmc_dev(host)); __mmc_claim_host()
958 pm_runtime_mark_last_busy(mmc_dev(host)); mmc_release_host()
959 pm_runtime_put_autosuspend(mmc_dev(host)); mmc_release_host()
1396 dev_err(mmc_dev(mmc), mmc_regulator_set_ocr()
1406 struct device *dev = mmc_dev(mmc); mmc_regulator_get_supply()
1447 dev_warn(mmc_dev(host), mmc_select_voltage()
1454 dev_warn(mmc_dev(host), "no support for card's volts\n"); mmc_select_voltage()
1466 dev_warn(mmc_dev(host), "exceeding card's volts\n"); mmc_select_voltage()
1633 dev_dbg(mmc_dev(host), "Initial signal voltage of 3.3v\n"); mmc_power_up()
1635 dev_dbg(mmc_dev(host), "Initial signal voltage of 1.8v\n"); mmc_power_up()
1637 dev_dbg(mmc_dev(host), "Initial signal voltage of 1.2v\n"); mmc_power_up()
1795 device_can_wakeup(mmc_dev(host))) _mmc_detect_change()
1796 pm_wakeup_event(mmc_dev(host), 5000); _mmc_detect_change()
H A Dbus.c55 ATTRIBUTE_GROUPS(mmc_dev); variable
/linux-4.1.27/include/linux/mmc/
H A Dhost.h389 #define mmc_dev(x) ((x)->parent) macro

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