Searched refs:max_tile_pipes (Results 1 – 8 of 8) sorted by relevance
353 *value = rdev->config.cik.max_tile_pipes; in radeon_info_ioctl()355 *value = rdev->config.si.max_tile_pipes; in radeon_info_ioctl()357 *value = rdev->config.cayman.max_tile_pipes; in radeon_info_ioctl()359 *value = rdev->config.evergreen.max_tile_pipes; in radeon_info_ioctl()361 *value = rdev->config.rv770.max_tile_pipes; in radeon_info_ioctl()363 *value = rdev->config.r600.max_tile_pipes; in radeon_info_ioctl()
1192 rdev->config.rv770.max_tile_pipes = 8; in rv770_gpu_init()1212 rdev->config.rv770.max_tile_pipes = 4; in rv770_gpu_init()1236 rdev->config.rv770.max_tile_pipes = 2; in rv770_gpu_init()1256 rdev->config.rv770.max_tile_pipes = 4; in rv770_gpu_init()1318 switch (rdev->config.rv770.max_tile_pipes) { in rv770_gpu_init()1333 rdev->config.rv770.tiling_npipes = rdev->config.rv770.max_tile_pipes; in rv770_gpu_init()
3200 rdev->config.evergreen.max_tile_pipes = 8; in evergreen_gpu_init()3222 rdev->config.evergreen.max_tile_pipes = 4; in evergreen_gpu_init()3244 rdev->config.evergreen.max_tile_pipes = 4; in evergreen_gpu_init()3267 rdev->config.evergreen.max_tile_pipes = 2; in evergreen_gpu_init()3289 rdev->config.evergreen.max_tile_pipes = 2; in evergreen_gpu_init()3311 rdev->config.evergreen.max_tile_pipes = 4; in evergreen_gpu_init()3339 rdev->config.evergreen.max_tile_pipes = 4; in evergreen_gpu_init()3361 rdev->config.evergreen.max_tile_pipes = 8; in evergreen_gpu_init()3383 rdev->config.evergreen.max_tile_pipes = 4; in evergreen_gpu_init()3405 rdev->config.evergreen.max_tile_pipes = 2; in evergreen_gpu_init()[all …]
2021 unsigned max_tile_pipes; member2043 unsigned max_tile_pipes; member2070 unsigned max_tile_pipes; member2097 unsigned max_tile_pipes; member2135 unsigned max_tile_pipes; member2166 unsigned max_tile_pipes; member
1949 rdev->config.r600.max_tile_pipes = 8; in r600_gpu_init()1965 rdev->config.r600.max_tile_pipes = 2; in r600_gpu_init()1983 rdev->config.r600.max_tile_pipes = 1; in r600_gpu_init()1998 rdev->config.r600.max_tile_pipes = 4; in r600_gpu_init()2029 switch (rdev->config.r600.max_tile_pipes) { in r600_gpu_init()2045 rdev->config.r600.tiling_npipes = rdev->config.r600.max_tile_pipes; in r600_gpu_init()
888 rdev->config.cayman.max_tile_pipes = 8; in cayman_gpu_init()912 rdev->config.cayman.max_tile_pipes = 2; in cayman_gpu_init()
3099 rdev->config.si.max_tile_pipes = 12; in si_gpu_init()3116 rdev->config.si.max_tile_pipes = 8; in si_gpu_init()3134 rdev->config.si.max_tile_pipes = 4; in si_gpu_init()3151 rdev->config.si.max_tile_pipes = 4; in si_gpu_init()3168 rdev->config.si.max_tile_pipes = 4; in si_gpu_init()3205 rdev->config.si.num_tile_pipes = rdev->config.si.max_tile_pipes; in si_gpu_init()
2341 num_pipe_configs = rdev->config.cik.max_tile_pipes; in cik_tiling_mode_table_init()3542 rdev->config.cik.max_tile_pipes = 4; in cik_gpu_init()3559 rdev->config.cik.max_tile_pipes = 16; in cik_gpu_init()3576 rdev->config.cik.max_tile_pipes = 4; in cik_gpu_init()3622 rdev->config.cik.max_tile_pipes = 2; in cik_gpu_init()3657 rdev->config.cik.num_tile_pipes = rdev->config.cik.max_tile_pipes; in cik_gpu_init()