| /linux-4.1.27/drivers/gpu/drm/nouveau/ |
| D | nouveau_dp.c | 70 nv_encoder->dp.link_bw = 27000 * dpcd[1]; in nouveau_dp_detect()
74 nv_encoder->dp.link_nr, nv_encoder->dp.link_bw, dpcd[0]); in nouveau_dp_detect()
77 nv_encoder->dcb->dpconf.link_bw); in nouveau_dp_detect()
81 if (nv_encoder->dcb->dpconf.link_bw < nv_encoder->dp.link_bw) in nouveau_dp_detect()
82 nv_encoder->dp.link_bw = nv_encoder->dcb->dpconf.link_bw; in nouveau_dp_detect()
85 nv_encoder->dp.link_nr, nv_encoder->dp.link_bw); in nouveau_dp_detect()
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| D | nouveau_encoder.h | 60 int link_bw; member
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| D | nouveau_bios.c | 1475 entry->dpconf.link_bw = 162000; in parse_dcb20_entry()
1478 entry->dpconf.link_bw = 270000; in parse_dcb20_entry()
1481 entry->dpconf.link_bw = 540000; in parse_dcb20_entry()
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| D | nouveau_connector.c | 863 max_clock *= nv_encoder->dp.link_bw; in nouveau_connector_mode_valid()
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| /linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/engine/disp/ |
| D | dport.c | 40 u32 link_bw; member
67 DBG("%d lanes at %d KB/s\n", dp->link_nr, dp->link_bw); in dp_set_link_config()
72 while ((dp->link_bw / 10) < nv_ro16(bios, lnkcmp)) in dp_set_link_config()
76 while ((dp->link_bw / 27000) < nv_ro08(bios, lnkcmp)) in dp_set_link_config()
84 ret = impl->lnk_ctl(outp, dp->link_nr, dp->link_bw / 27000, in dp_set_link_config()
96 sink[0] = dp->link_bw / 27000; in dp_set_link_config()
343 if (outp->dpcd[1] > outp->base.info.dpconf.link_bw) in nvkm_dp_train()
344 outp->dpcd[1] = outp->base.info.dpconf.link_bw; in nvkm_dp_train()
366 dp->link_bw = cfg->bw * 27000; in nvkm_dp_train()
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| D | gf110.c | 990 u32 datarate, link_nr, link_bw, bits; in gf110_disp_intr_unk2_2_tu() local
994 link_bw = (clksor & 0x007c0000) >> 18; in gf110_disp_intr_unk2_2_tu()
995 link_bw *= 27000; in gf110_disp_intr_unk2_2_tu()
999 value = value * link_bw; in gf110_disp_intr_unk2_2_tu()
1006 value = value * link_bw; in gf110_disp_intr_unk2_2_tu()
1019 do_div(ratio, link_nr * link_bw); in gf110_disp_intr_unk2_2_tu()
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| D | nv50.c | 1654 u32 link_nr, link_bw, bits; in nv50_disp_intr_unk20_2_dp() local
1657 link_bw = (clksor & 0x000c0000) ? 270000 : 162000; in nv50_disp_intr_unk20_2_dp()
1662 value = value * link_bw; in nv50_disp_intr_unk20_2_dp()
1669 value = value * link_bw; in nv50_disp_intr_unk20_2_dp()
1683 do_div(link_ratio, link_bw); in nv50_disp_intr_unk20_2_dp()
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| D | outpdp.c | 84 outp->base.info.dpconf.link_bw; in nvkm_output_dp_train()
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| /linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/subdev/bios/ |
| D | dcb.c | 148 outp->dpconf.link_bw = 0x06; in dcb_outp_parse()
151 outp->dpconf.link_bw = 0x0a; in dcb_outp_parse()
155 outp->dpconf.link_bw = 0x14; in dcb_outp_parse()
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| /linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/ |
| D | anx9805.c | 33 anx9805_train(struct nvkm_i2c_port *port, int link_nr, int link_bw, bool enh) in anx9805_train() argument
39 DBG("ANX9805 train %d 0x%02x %d\n", link_nr, link_bw, enh); in anx9805_train()
41 nv_wri2cr(mast, chan->addr, 0xa0, link_bw); in anx9805_train()
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| /linux-4.1.27/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/ |
| D | dcb.h | 47 int link_bw; member
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| /linux-4.1.27/drivers/gpu/drm/gma500/ |
| D | cdv_intel_dp.c | 264 uint8_t link_bw; member
359 cdv_intel_dp_link_clock(uint8_t link_bw) in cdv_intel_dp_link_clock() argument
361 if (link_bw == DP_LINK_BW_2_7) in cdv_intel_dp_link_clock()
919 intel_dp->link_bw = bws[clock]; in cdv_intel_dp_mode_fixup()
921 adjusted_mode->clock = cdv_intel_dp_link_clock(intel_dp->link_bw); in cdv_intel_dp_mode_fixup()
924 intel_dp->link_bw, intel_dp->lane_count, in cdv_intel_dp_mode_fixup()
933 intel_dp->link_bw = bws[max_clock]; in cdv_intel_dp_mode_fixup()
934 adjusted_mode->clock = cdv_intel_dp_link_clock(intel_dp->link_bw); in cdv_intel_dp_mode_fixup()
937 intel_dp->link_bw, intel_dp->lane_count, in cdv_intel_dp_mode_fixup()
1073 intel_dp->link_configuration[0] = intel_dp->link_bw; in cdv_intel_dp_mode_set()
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| /linux-4.1.27/drivers/gpu/drm/ |
| D | drm_dp_helper.c | 148 int drm_dp_bw_code_to_link_rate(u8 link_bw) in drm_dp_bw_code_to_link_rate() argument
150 switch (link_bw) { in drm_dp_bw_code_to_link_rate()
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| /linux-4.1.27/drivers/gpu/drm/i915/ |
| D | intel_dp_mst.c | 59 intel_dp->link_bw = 0; in intel_dp_mst_compute_config()
62 intel_dp->link_bw = drm_dp_link_rate_to_bw_code(rate); in intel_dp_mst_compute_config()
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| D | intel_dp.c | 45 int link_bw; member
1125 hsw_dp_set_ddi_pll_sel(struct intel_crtc_state *pipe_config, int link_bw) in hsw_dp_set_ddi_pll_sel() argument
1127 switch (link_bw) { in hsw_dp_set_ddi_pll_sel()
1188 struct intel_crtc_state *pipe_config, int link_bw) in intel_dp_set_clock() argument
1210 if (link_bw == divisor[i].link_bw) { in intel_dp_set_clock()
1443 intel_dp->link_bw = 0; in intel_dp_compute_config()
1447 intel_dp->link_bw = in intel_dp_compute_config()
1456 intel_dp->link_bw, intel_dp->lane_count, in intel_dp_compute_config()
1478 hsw_dp_set_ddi_pll_sel(pipe_config, intel_dp->link_bw); in intel_dp_compute_config()
1480 intel_dp_set_clock(encoder, pipe_config, intel_dp->link_bw); in intel_dp_compute_config()
[all …]
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| D | intel_drv.h | 622 uint8_t link_bw; member
954 int ironlake_get_lanes_required(int target_clock, int link_bw, int bpp);
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| D | intel_ddi.c | 1180 switch (intel_dp->link_bw) { in skl_ddi_pll_select()
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| D | intel_display.c | 5766 int lane, link_bw, fdi_dotclock; in ironlake_fdi_compute_config() local
5777 link_bw = intel_fdi_link_freq(dev) * MHz(100)/KHz(1)/10; in ironlake_fdi_compute_config()
5781 lane = ironlake_get_lanes_required(fdi_dotclock, link_bw, in ironlake_fdi_compute_config()
5787 link_bw, &pipe_config->fdi_m_n); in ironlake_fdi_compute_config()
7722 int ironlake_get_lanes_required(int target_clock, int link_bw, int bpp) in ironlake_get_lanes_required() argument
7730 return DIV_ROUND_UP(bps, link_bw * 8); in ironlake_get_lanes_required()
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| /linux-4.1.27/include/drm/ |
| D | drm_dp_helper.h | 588 int drm_dp_bw_code_to_link_rate(u8 link_bw);
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