/linux-4.1.27/arch/cris/arch-v10/drivers/ |
H A D | i2c.c | 73 #define i2c_clk(x) \ macro 99 #define i2c_clk(x) \ macro 101 ~IO_MASK(R_PORT_PB_I2C, i2c_clk)) | IO_FIELD(R_PORT_PB_I2C, i2c_clk, (x))); \ 134 i2c_clk(I2C_CLOCK_HIGH); i2c_start() 144 i2c_clk(I2C_CLOCK_LOW); i2c_start() 158 i2c_clk(I2C_CLOCK_LOW); i2c_stop() 164 i2c_clk(I2C_CLOCK_HIGH); i2c_stop() 192 i2c_clk(I2C_CLOCK_HIGH); i2c_outbyte() 194 i2c_clk(I2C_CLOCK_LOW); i2c_outbyte() 230 i2c_clk(I2C_CLOCK_HIGH); i2c_inbyte() 232 i2c_clk(I2C_CLOCK_LOW); i2c_inbyte() 247 i2c_clk(I2C_CLOCK_HIGH); i2c_inbyte() 254 i2c_clk(I2C_CLOCK_LOW); i2c_inbyte() 287 i2c_clk(I2C_CLOCK_HIGH); i2c_getack() 292 i2c_clk(1); i2c_getack() 328 i2c_clk(I2C_CLOCK_LOW); i2c_getack() 365 i2c_clk(I2C_CLOCK_HIGH); i2c_sendack() 367 i2c_clk(I2C_CLOCK_LOW); i2c_sendack() 401 i2c_clk(I2C_CLOCK_HIGH); i2c_sendnack() 403 i2c_clk(I2C_CLOCK_LOW); i2c_sendnack() 644 IO_FIELD(R_PORT_PB_I2C, i2c_clk, 1) | i2c_init()
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/linux-4.1.27/arch/cris/arch-v32/drivers/ |
H A D | i2c.c | 73 #define i2c_clk(x) crisv32_io_set(&cris_i2c_clk, x) macro 103 i2c_clk(I2C_CLOCK_HIGH); i2c_start() 113 i2c_clk(I2C_CLOCK_LOW); i2c_start() 127 i2c_clk(I2C_CLOCK_LOW); i2c_stop() 133 i2c_clk(I2C_CLOCK_HIGH); i2c_stop() 161 i2c_clk(I2C_CLOCK_HIGH); i2c_outbyte() 163 i2c_clk(I2C_CLOCK_LOW); i2c_outbyte() 199 i2c_clk(I2C_CLOCK_HIGH); i2c_inbyte() 201 i2c_clk(I2C_CLOCK_LOW); i2c_inbyte() 216 i2c_clk(I2C_CLOCK_HIGH); i2c_inbyte() 223 i2c_clk(I2C_CLOCK_LOW); i2c_inbyte() 256 i2c_clk(I2C_CLOCK_HIGH); i2c_getack() 262 i2c_clk(1); i2c_getack() 302 i2c_clk(I2C_CLOCK_LOW); i2c_getack() 339 i2c_clk(I2C_CLOCK_HIGH); i2c_sendack() 341 i2c_clk(I2C_CLOCK_LOW); i2c_sendack() 375 i2c_clk(I2C_CLOCK_HIGH); i2c_sendnack() 377 i2c_clk(I2C_CLOCK_LOW); i2c_sendnack()
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/linux-4.1.27/drivers/mfd/ |
H A D | intel_quark_i2c_gpio.c | 55 struct clk *i2c_clk; member in struct:intel_quark_mfd 118 struct clk *i2c_clk; intel_quark_register_i2c_clk() local 128 i2c_clk = clk_register_fixed_rate(&pdev->dev, intel_quark_register_i2c_clk() 133 quark_mfd->i2c_clk = i2c_clk; intel_quark_register_i2c_clk() 135 ret = clk_register_clkdevs(i2c_clk, i2c_clk_lookup, intel_quark_register_i2c_clk() 147 if (!quark_mfd->i2c_clk || !quark_mfd->i2c_clk_lookup) intel_quark_unregister_i2c_clk() 151 clk_unregister(quark_mfd->i2c_clk); intel_quark_unregister_i2c_clk()
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/linux-4.1.27/drivers/i2c/busses/ |
H A D | i2c-axxia.c | 92 * @i2c_clk: clock reference for i2c input clock 103 struct clk *i2c_clk; member in struct:axxia_i2c_dev 133 u32 divisor = clk_get_rate(idev->i2c_clk) / idev->bus_clk_rate; axxia_i2c_init() 134 u32 clk_mhz = clk_get_rate(idev->i2c_clk) / 1000000; axxia_i2c_init() 481 idev->i2c_clk = devm_clk_get(&pdev->dev, "i2c"); axxia_i2c_probe() 482 if (IS_ERR(idev->i2c_clk)) { axxia_i2c_probe() 484 return PTR_ERR(idev->i2c_clk); axxia_i2c_probe() 508 clk_prepare_enable(idev->i2c_clk); axxia_i2c_probe() 533 clk_disable_unprepare(idev->i2c_clk); axxia_i2c_remove()
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H A D | i2c-jz4780.c | 264 int i2c_clk = i2c->speed; jz4780_i2c_set_speed() local 270 * 1 JZ4780_I2C cycle equals to cnt_period PCLK(i2c_clk) jz4780_i2c_set_speed() 274 cnt_period = dev_clk_khz / i2c_clk; jz4780_i2c_set_speed() 276 if (i2c_clk <= 100) jz4780_i2c_set_speed() 290 if (i2c_clk <= 100) { jz4780_i2c_set_speed() 319 * 1i2c_clk = 10^6 / dev_clk_khz jz4780_i2c_set_speed() 320 * on FPGA, dev_clk_khz = 12000, so 1i2c_clk = 1000/12 = 83ns jz4780_i2c_set_speed() 321 * on Pisces(1008M), dev_clk_khz=126000, so 1i2c_clk = 1000 / 126 = 8ns jz4780_i2c_set_speed() 323 * The actual hold time is (SDAHD + 1) * (i2c_clk period). jz4780_i2c_set_speed() 328 if (i2c_clk <= 100) { /* standard mode */ jz4780_i2c_set_speed()
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H A D | i2c-cadence.c | 134 * @i2c_clk: Maximum I2C clock speed 153 unsigned int i2c_clk; member in struct:cdns_i2c 692 unsigned long fscl = id->i2c_clk; cdns_i2c_setclk() 736 unsigned long fscl = id->i2c_clk; cdns_i2c_clk_notifier_cb() 873 &id->i2c_clk); cdns_i2c_probe() 874 if (ret || (id->i2c_clk > CDNS_I2C_SPEED_MAX)) cdns_i2c_probe() 875 id->i2c_clk = CDNS_I2C_SPEED_DEFAULT; cdns_i2c_probe() 882 dev_err(&pdev->dev, "invalid SCL clock: %u Hz\n", id->i2c_clk); cdns_i2c_probe() 910 id->i2c_clk / 1000, (unsigned long)r_mem->start, id->irq); cdns_i2c_probe()
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H A D | i2c-nomadik.c | 354 u32 i2c_clk, div; setup_i2c_controller() local 364 i2c_clk = clk_get_rate(dev->clk); setup_i2c_controller() 378 ns = DIV_ROUND_UP_ULL(1000000000ULL, i2c_clk); setup_i2c_controller() 412 brcr2 = (i2c_clk/(dev->clk_freq * div)) & 0xffff; setup_i2c_controller() 426 brcr2 = i2c_clk/(100000 * 2) & 0xffff; setup_i2c_controller()
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/linux-4.1.27/drivers/staging/nvec/ |
H A D | nvec.c | 729 clk_prepare_enable(nvec->i2c_clk); tegra_init_i2c_slave() 739 clk_set_rate(nvec->i2c_clk, 8 * 80000); tegra_init_i2c_slave() 755 clk_disable_unprepare(nvec->i2c_clk); nvec_disable_i2c_slave() 791 struct clk *i2c_clk; tegra_nvec_probe() local 827 i2c_clk = devm_clk_get(&pdev->dev, "div-clk"); tegra_nvec_probe() 828 if (IS_ERR(i2c_clk)) { tegra_nvec_probe() 840 nvec->i2c_clk = i2c_clk; tegra_nvec_probe()
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H A D | nvec.h | 113 * @i2c_clk: The clock of the I2C device 143 struct clk *i2c_clk; member in struct:nvec_chip
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/linux-4.1.27/arch/arm/mach-davinci/ |
H A D | dm644x.c | 196 static struct clk i2c_clk = { variable in typeref:struct:clk 311 CLK("i2c_davinci.1", NULL, &i2c_clk),
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H A D | dm646x.c | 232 static struct clk i2c_clk = { variable in typeref:struct:clk 348 CLK("i2c_davinci.1", NULL, &i2c_clk),
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H A D | dm355.c | 218 static struct clk i2c_clk = { variable in typeref:struct:clk 362 CLK("i2c_davinci.1", NULL, &i2c_clk),
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H A D | dm365.c | 282 static struct clk i2c_clk = { variable in typeref:struct:clk 460 CLK("i2c_davinci.1", NULL, &i2c_clk),
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/linux-4.1.27/drivers/clk/spear/ |
H A D | spear6xx_clock.c | 304 clk = clk_register_gate(NULL, "i2c_clk", "ahb_clk", 0, PERIP1_CLK_ENB, spear6xx_clk_init()
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