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Searched refs:fixed20_12 (Results 1 – 12 of 12) sorted by relevance

/linux-4.1.27/include/drm/
Ddrm_fixed.h32 } fixed20_12; typedef
45 static inline u32 dfixed_floor(fixed20_12 A) in dfixed_floor()
52 static inline u32 dfixed_ceil(fixed20_12 A) in dfixed_ceil()
62 static inline u32 dfixed_div(fixed20_12 A, fixed20_12 B) in dfixed_div()
/linux-4.1.27/drivers/gpu/drm/radeon/
Drs690.c71 fixed20_12 tmp; in rs690_pm_info()
250 fixed20_12 num_line_pair;
251 fixed20_12 estimated_width;
252 fixed20_12 worst_case_latency;
253 fixed20_12 consumption_rate;
254 fixed20_12 active_time;
255 fixed20_12 dbpp;
256 fixed20_12 priority_mark_max;
257 fixed20_12 priority_mark;
258 fixed20_12 sclk;
[all …]
Drv515.c942 fixed20_12 num_line_pair;
943 fixed20_12 estimated_width;
944 fixed20_12 worst_case_latency;
945 fixed20_12 consumption_rate;
946 fixed20_12 active_time;
947 fixed20_12 dbpp;
948 fixed20_12 priority_mark_max;
949 fixed20_12 priority_mark;
950 fixed20_12 sclk;
959 fixed20_12 a, b, c; in rv515_crtc_bandwidth_compute()
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Dradeon.h1608 fixed20_12 max_bandwidth;
1609 fixed20_12 igp_sideport_mclk;
1610 fixed20_12 igp_system_mclk;
1611 fixed20_12 igp_ht_link_clk;
1612 fixed20_12 igp_ht_link_width;
1613 fixed20_12 k8_bandwidth;
1614 fixed20_12 sideport_bandwidth;
1615 fixed20_12 ht_bandwidth;
1616 fixed20_12 core_bandwidth;
1617 fixed20_12 sclk;
[all …]
Devergreen.c1989 fixed20_12 vsc; /* vertical scale ratio */
1999 fixed20_12 dram_efficiency; /* 0.7 */ in evergreen_dram_bandwidth()
2000 fixed20_12 yclk, dram_channels, bandwidth; in evergreen_dram_bandwidth()
2001 fixed20_12 a; in evergreen_dram_bandwidth()
2019 fixed20_12 disp_dram_allocation; /* 0.3 to 0.7 */ in evergreen_dram_bandwidth_for_display()
2020 fixed20_12 yclk, dram_channels, bandwidth; in evergreen_dram_bandwidth_for_display()
2021 fixed20_12 a; in evergreen_dram_bandwidth_for_display()
2039 fixed20_12 return_efficiency; /* 0.8 */ in evergreen_data_return_bandwidth()
2040 fixed20_12 sclk, bandwidth; in evergreen_data_return_bandwidth()
2041 fixed20_12 a; in evergreen_data_return_bandwidth()
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Dr100.c3151 fixed20_12 trcd_ff, trp_ff, tras_ff, trbs_ff, tcas_ff; in r100_bandwidth_update()
3152 fixed20_12 sclk_ff, mclk_ff, sclk_eff_ff, sclk_delay_ff; in r100_bandwidth_update()
3153 fixed20_12 peak_disp_bw, mem_bw, pix_clk, pix_clk2, temp_ff, crit_point_ff; in r100_bandwidth_update()
3155 fixed20_12 memtcas_ff[8] = { in r100_bandwidth_update()
3164 fixed20_12 memtcas_rs480_ff[8] = { in r100_bandwidth_update()
3174 fixed20_12 memtcas2_ff[8] = { in r100_bandwidth_update()
3184 fixed20_12 memtrbs[8] = { in r100_bandwidth_update()
3194 fixed20_12 memtrbs_r4xx[8] = { in r100_bandwidth_update()
3204 fixed20_12 min_mem_eff; in r100_bandwidth_update()
3205 fixed20_12 mc_latency_sclk, mc_latency_mclk, k1; in r100_bandwidth_update()
[all …]
Dsi.c2006 fixed20_12 vsc; /* vertical scale ratio */
2016 fixed20_12 dram_efficiency; /* 0.7 */ in dce6_dram_bandwidth()
2017 fixed20_12 yclk, dram_channels, bandwidth; in dce6_dram_bandwidth()
2018 fixed20_12 a; in dce6_dram_bandwidth()
2036 fixed20_12 disp_dram_allocation; /* 0.3 to 0.7 */ in dce6_dram_bandwidth_for_display()
2037 fixed20_12 yclk, dram_channels, bandwidth; in dce6_dram_bandwidth_for_display()
2038 fixed20_12 a; in dce6_dram_bandwidth_for_display()
2056 fixed20_12 return_efficiency; /* 0.8 */ in dce6_data_return_bandwidth()
2057 fixed20_12 sclk, bandwidth; in dce6_data_return_bandwidth()
2058 fixed20_12 a; in dce6_data_return_bandwidth()
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Dcik.c9179 fixed20_12 vsc; /* vertical scale ratio */
9198 fixed20_12 dram_efficiency; /* 0.7 */ in dce8_dram_bandwidth()
9199 fixed20_12 yclk, dram_channels, bandwidth; in dce8_dram_bandwidth()
9200 fixed20_12 a; in dce8_dram_bandwidth()
9227 fixed20_12 disp_dram_allocation; /* 0.3 to 0.7 */ in dce8_dram_bandwidth_for_display()
9228 fixed20_12 yclk, dram_channels, bandwidth; in dce8_dram_bandwidth_for_display()
9229 fixed20_12 a; in dce8_dram_bandwidth_for_display()
9256 fixed20_12 return_efficiency; /* 0.8 */ in dce8_data_return_bandwidth()
9257 fixed20_12 sclk, bandwidth; in dce8_data_return_bandwidth()
9258 fixed20_12 a; in dce8_data_return_bandwidth()
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Dradeon_mode.h348 fixed20_12 vsc;
349 fixed20_12 hsc;
Dradeon_device.c707 fixed20_12 a; in radeon_update_bandwidth_info()
Dradeon_display.c1749 fixed20_12 a, b; in radeon_crtc_scaling_mode_fixup()
/linux-4.1.27/drivers/gpu/drm/tegra/
Ddc.c195 fixed20_12 outf = dfixed_init(out); in compute_dda_inc()
196 fixed20_12 inf = dfixed_init(in); in compute_dda_inc()
228 fixed20_12 inf = dfixed_init(in); in compute_initial_dda()