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Searched refs:dspcntr (Results 1 – 10 of 10) sorted by relevance

/linux-4.1.27/drivers/gpu/drm/gma500/
Dmdfld_intel_display.c131 u32 dspcntr; in mdfld__intel_plane_set_alpha() local
133 dspcntr = REG_READ(dspcntr_reg); in mdfld__intel_plane_set_alpha()
136 dspcntr &= ~DISPPLANE_32BPP_NO_ALPHA; in mdfld__intel_plane_set_alpha()
137 dspcntr |= DISPPLANE_32BPP; in mdfld__intel_plane_set_alpha()
139 dspcntr &= ~DISPPLANE_32BPP; in mdfld__intel_plane_set_alpha()
140 dspcntr |= DISPPLANE_32BPP_NO_ALPHA; in mdfld__intel_plane_set_alpha()
143 REG_WRITE(dspcntr_reg, dspcntr); in mdfld__intel_plane_set_alpha()
173 u32 dspcntr; in mdfld__intel_pipe_set_base() local
202 dspcntr = REG_READ(map->cntr); in mdfld__intel_pipe_set_base()
203 dspcntr &= ~DISPPLANE_PIXFORMAT_MASK; in mdfld__intel_pipe_set_base()
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Doaktrail_crtc.c378 u32 dpll = 0, fp = 0, dspcntr, pipeconf; in oaktrail_crtc_mode_set() local
495 dspcntr = REG_READ(map->cntr); in oaktrail_crtc_mode_set()
496 dspcntr |= DISPPLANE_GAMMA_ENABLE; in oaktrail_crtc_mode_set()
499 dspcntr |= DISPPLANE_SEL_PIPE_A; in oaktrail_crtc_mode_set()
501 dspcntr |= DISPPLANE_SEL_PIPE_B; in oaktrail_crtc_mode_set()
587 REG_WRITE_WITH_AUX(map->cntr, dspcntr, i); in oaktrail_crtc_mode_set()
607 u32 dspcntr; in oaktrail_pipe_set_base() local
624 dspcntr = REG_READ(map->cntr); in oaktrail_pipe_set_base()
625 dspcntr &= ~DISPPLANE_PIXFORMAT_MASK; in oaktrail_pipe_set_base()
629 dspcntr |= DISPPLANE_8BPP; in oaktrail_pipe_set_base()
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Dpsb_intel_display.c116 u32 dpll = 0, fp = 0, dspcntr, pipeconf; in psb_intel_crtc_mode_set() local
205 dspcntr = DISPPLANE_GAMMA_ENABLE; in psb_intel_crtc_mode_set()
208 dspcntr |= DISPPLANE_SEL_PIPE_A; in psb_intel_crtc_mode_set()
210 dspcntr |= DISPPLANE_SEL_PIPE_B; in psb_intel_crtc_mode_set()
212 dspcntr |= DISPLAY_PLANE_ENABLE; in psb_intel_crtc_mode_set()
297 REG_WRITE(map->cntr, dspcntr); in psb_intel_crtc_mode_set()
Dgma_display.c66 u32 dspcntr; in gma_pipe_set_base() local
88 dspcntr = REG_READ(map->cntr); in gma_pipe_set_base()
89 dspcntr &= ~DISPPLANE_PIXFORMAT_MASK; in gma_pipe_set_base()
93 dspcntr |= DISPPLANE_8BPP; in gma_pipe_set_base()
97 dspcntr |= DISPPLANE_15_16BPP; in gma_pipe_set_base()
99 dspcntr |= DISPPLANE_16BPP; in gma_pipe_set_base()
103 dspcntr |= DISPPLANE_32BPP_NO_ALPHA; in gma_pipe_set_base()
110 REG_WRITE(map->cntr, dspcntr); in gma_pipe_set_base()
Doaktrail_hdmi.c281 u32 dspcntr, pipeconf, dpll, temp; in oaktrail_crtc_hdmi_mode_set() local
355 dspcntr = REG_READ(dspcntr_reg); in oaktrail_crtc_hdmi_mode_set()
356 dspcntr |= DISPPLANE_GAMMA_ENABLE; in oaktrail_crtc_hdmi_mode_set()
357 dspcntr |= DISPPLANE_SEL_PIPE_B; in oaktrail_crtc_hdmi_mode_set()
358 dspcntr |= DISPLAY_PLANE_ENABLE; in oaktrail_crtc_hdmi_mode_set()
371 REG_WRITE(dspcntr_reg, dspcntr); in oaktrail_crtc_hdmi_mode_set()
Dcdv_intel_display.c591 u32 dpll = 0, dspcntr, pipeconf; in cdv_intel_crtc_mode_set() local
726 dspcntr = DISPPLANE_GAMMA_ENABLE; in cdv_intel_crtc_mode_set()
729 dspcntr |= DISPPLANE_SEL_PIPE_A; in cdv_intel_crtc_mode_set()
731 dspcntr |= DISPPLANE_SEL_PIPE_B; in cdv_intel_crtc_mode_set()
733 dspcntr |= DISPLAY_PLANE_ENABLE; in cdv_intel_crtc_mode_set()
822 REG_WRITE(map->cntr, dspcntr); in cdv_intel_crtc_mode_set()
Dmdfld_dsi_dpi.c123 u32 dspcntr = dev_priv->dspcntr[pipe]; in dsi_set_pipe_plane_enable_state() local
141 REG_WRITE(dspcntr_reg, dspcntr); in dsi_set_pipe_plane_enable_state()
829 u32 dspcntr = dev_priv->dspcntr[pipe]; in mdfld_dsi_dpi_mode_set() local
907 REG_WRITE(dspcntr_reg, dspcntr); in mdfld_dsi_dpi_mode_set()
Dpsb_drv.h602 u32 dspcntr[3]; member
/linux-4.1.27/drivers/video/fbdev/vermilion/
Dvermilion.c783 u32 dspcntr; in vmlfb_set_par_locked() local
809 dspcntr = VML_GFX_ENABLE | VML_GFX_GAMMABYPASS; in vmlfb_set_par_locked()
823 dspcntr |= VML_GFX_ARGB1555; in vmlfb_set_par_locked()
827 dspcntr |= VML_GFX_ARGB8888 | VML_GFX_ALPHAMULT; in vmlfb_set_par_locked()
829 dspcntr |= VML_GFX_RGB0888; in vmlfb_set_par_locked()
866 VML_WRITE32(par, VML_DSPCCNTR, dspcntr); in vmlfb_set_par_locked()
/linux-4.1.27/drivers/gpu/drm/i915/
Dintel_display.c2675 u32 dspcntr; in i9xx_update_primary_plane() local
2695 dspcntr = DISPPLANE_GAMMA_ENABLE; in i9xx_update_primary_plane()
2697 dspcntr |= DISPLAY_PLANE_ENABLE; in i9xx_update_primary_plane()
2701 dspcntr |= DISPPLANE_SEL_PIPE_B; in i9xx_update_primary_plane()
2720 dspcntr |= DISPPLANE_8BPP; in i9xx_update_primary_plane()
2724 dspcntr |= DISPPLANE_BGRX555; in i9xx_update_primary_plane()
2727 dspcntr |= DISPPLANE_BGRX565; in i9xx_update_primary_plane()
2731 dspcntr |= DISPPLANE_BGRX888; in i9xx_update_primary_plane()
2735 dspcntr |= DISPPLANE_RGBX888; in i9xx_update_primary_plane()
2739 dspcntr |= DISPPLANE_BGRX101010; in i9xx_update_primary_plane()
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