| /linux-4.1.27/arch/c6x/platforms/ |
| D | dscr.c | 117 static struct dscr_regs dscr; variable
124 if (dscr.locked[i].key && reg == dscr.locked[i].reg) in find_locked_reg()
125 return &dscr.locked[i]; in find_locked_reg()
135 void __iomem *reg_addr = dscr.base + reg; in dscr_write_locked1()
136 void __iomem *lock_addr = dscr.base + lock; in dscr_write_locked1()
165 soc_writel(key0, dscr.base + lock0); in dscr_write_locked2()
166 soc_writel(key1, dscr.base + lock1); in dscr_write_locked2()
167 soc_writel(val, dscr.base + reg); in dscr_write_locked2()
168 soc_writel(0, dscr.base + lock0); in dscr_write_locked2()
169 soc_writel(0, dscr.base + lock1); in dscr_write_locked2()
[all …]
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| D | Makefile | 8 obj-y += dscr.o
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| /linux-4.1.27/arch/c6x/boot/dts/ |
| D | tms320c6455.dtsi | 56 ti,dscr-dev-enable = <13>;
67 ti,dscr-dev-enable = <4>;
79 compatible = "ti,c64x+dscr";
82 ti,dscr-devstat = <0>;
83 ti,dscr-silicon-rev = <8 28 0xf>;
84 ti,dscr-rmii-resets = <0 0x40020 0x00040000>;
86 ti,dscr-locked-regs = <0x40008 0x40004 0x0f0a0b00>;
87 ti,dscr-devstate-ctl-regs =
91 ti,dscr-devstate-stat-regs =
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| D | tms320c6472.dtsi | 113 compatible = "ti,c64x+dscr";
116 ti,dscr-devstat = <0>;
117 ti,dscr-silicon-rev = <0x70c 16 0xff>;
119 ti,dscr-mac-fuse-regs = <0x700 1 2 3 4
122 ti,dscr-rmii-resets = <0x208 1
125 ti,dscr-locked-regs = <0x200 0x204 0x0a1e183a
129 ti,dscr-privperm = <0x41c 0xaaaaaaaa>;
131 ti,dscr-devstate-ctl-regs = <0 13 0x200 1 0 0 1>;
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| D | tms320c6457.dtsi | 44 compatible = "ti,c64x+dscr";
47 ti,dscr-devstat = <0x20>;
48 ti,dscr-silicon-rev = <0x18 28 0xf>;
49 ti,dscr-mac-fuse-regs = <0x114 3 4 5 6
51 ti,dscr-kick-regs = <0x38 0x83E70B13
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| D | tms320c6474.dtsi | 72 compatible = "ti,c64x+dscr";
75 ti,dscr-devstat = <0x004>;
76 ti,dscr-silicon-rev = <0x014 28 0xf>;
77 ti,dscr-mac-fuse-regs = <0x34 3 4 5 6
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| D | tms320c6678.dtsi | 135 compatible = "ti,c64x+dscr";
138 ti,dscr-devstat = <0x20>;
139 ti,dscr-silicon-rev = <0x18 28 0xf>;
141 ti,dscr-mac-fuse-regs = <0x110 1 2 3 4
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| /linux-4.1.27/Documentation/devicetree/bindings/c6x/ |
| D | dscr.txt | 24 - compatible: must be "ti,c64x+dscr"
34 - ti,dscr-devstat
37 - ti,dscr-silicon-rev
40 - ti,dscr-rmii-resets
44 - ti,dscr-locked-regs
49 - ti,dscr-kick-regs
55 - ti,dscr-mac-fuse-regs
63 - ti,dscr-devstate-ctl-regs
79 - ti,dscr-devstate-stat-regs
96 - ti,dscr-privperm
[all …]
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| D | emifa.txt | 18 - ti,dscr-dev-enable: Device ID if EMIF is enabled/disabled from DSCR
41 ti,dscr-dev-enable = <13>;
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| D | timer64.txt | 15 - ti,dscr-dev-enable: Device ID used to enable timer IP through DSCR interface.
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| /linux-4.1.27/drivers/gpu/drm/atmel-hlcdc/ |
| D | atmel_hlcdc_layer.c | 93 struct atmel_hlcdc_dma_channel_dscr *dscr; in atmel_hlcdc_layer_update_apply() local
118 dscr = fb_flip->dscrs[i]; in atmel_hlcdc_layer_update_apply()
119 dscr->ctrl = ATMEL_HLCDC_LAYER_DFETCH | in atmel_hlcdc_layer_update_apply()
127 dscr->addr); in atmel_hlcdc_layer_update_apply()
131 dscr->ctrl); in atmel_hlcdc_layer_update_apply()
135 dscr->next); in atmel_hlcdc_layer_update_apply()
142 dscr = fb_flip->dscrs[i]; in atmel_hlcdc_layer_update_apply()
143 dscr->ctrl = ATMEL_HLCDC_LAYER_DFETCH | in atmel_hlcdc_layer_update_apply()
151 dscr->next); in atmel_hlcdc_layer_update_apply()
440 struct atmel_hlcdc_dma_channel_dscr *dscr; in atmel_hlcdc_layer_update_set_fb() local
[all …]
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| /linux-4.1.27/arch/arm/kernel/ |
| D | hw_breakpoint.c | 238 u32 dscr; in monitor_mode_enabled() local
239 ARM_DBG_READ(c0, c1, 0, dscr); in monitor_mode_enabled()
240 return !!(dscr & ARM_DSCR_MDBGEN); in monitor_mode_enabled()
245 u32 dscr; in enable_monitor_mode() local
246 ARM_DBG_READ(c0, c1, 0, dscr); in enable_monitor_mode()
249 if (dscr & ARM_DSCR_MDBGEN) in enable_monitor_mode()
256 ARM_DBG_WRITE(c0, c1, 0, (dscr | ARM_DSCR_MDBGEN)); in enable_monitor_mode()
261 ARM_DBG_WRITE(c0, c2, 2, (dscr | ARM_DSCR_MDBGEN)); in enable_monitor_mode()
269 ARM_DBG_READ(c0, c1, 0, dscr); in enable_monitor_mode()
270 if (!(dscr & ARM_DSCR_MDBGEN)) { in enable_monitor_mode()
[all …]
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| /linux-4.1.27/Documentation/ABI/stable/ |
| D | sysfs-devices-system-cpu | 6 /sys/devices/system/cpu/cpuN/dscr on all CPUs.
12 What: /sys/devices/system/cpu/cpu[0-9]+/dscr
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| /linux-4.1.27/tools/testing/selftests/powerpc/tm/ |
| D | .gitignore | 1 tm-resched-dscr
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| D | Makefile | 1 TEST_PROGS := tm-resched-dscr
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| /linux-4.1.27/arch/mips/alchemy/common/ |
| D | dbdma.c | 934 u32 au1xxx_dbdma_put_dscr(u32 chanid, au1x_ddma_desc_t *dscr) in au1xxx_dbdma_put_dscr() argument
961 dp->dscr_dest0 = dscr->dscr_dest0; in au1xxx_dbdma_put_dscr()
962 dp->dscr_source0 = dscr->dscr_source0; in au1xxx_dbdma_put_dscr()
963 dp->dscr_dest1 = dscr->dscr_dest1; in au1xxx_dbdma_put_dscr()
964 dp->dscr_source1 = dscr->dscr_source1; in au1xxx_dbdma_put_dscr()
965 dp->dscr_cmd1 = dscr->dscr_cmd1; in au1xxx_dbdma_put_dscr()
966 nbytes = dscr->dscr_cmd1; in au1xxx_dbdma_put_dscr()
969 dp->dscr_cmd0 |= dscr->dscr_cmd0 | DSCR_CMD0_V; in au1xxx_dbdma_put_dscr()
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| /linux-4.1.27/drivers/dma/ |
| D | at_hdmac_regs.h | 176 dma_addr_t dscr; /* chain to next lli */ member
380 lli->ctrla, lli->ctrlb, lli->dscr); in atc_dump_lli()
449 desc->lli.dscr = 0; in set_desc_eol()
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| D | at_hdmac.c | 208 (*prev)->lli.dscr = desc->txd.phys; in atc_desc_chain()
319 u32 ctrla, dscr; in atc_get_bytes_left() local
335 if (desc_first->lli.dscr) { in atc_get_bytes_left()
349 dscr = channel_readl(atchan, DSCR); in atc_get_bytes_left()
352 if (desc_first->lli.dscr == dscr) in atc_get_bytes_left()
357 if (desc->lli.dscr == dscr) in atc_get_bytes_left()
369 if (!desc->lli.dscr) in atc_get_bytes_left()
1152 prev->lli.dscr = first->txd.phys; in atc_prep_dma_cyclic()
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| /linux-4.1.27/arch/powerpc/include/asm/ |
| D | switch_to.h | 24 prev->dscr = mfspr(SPRN_DSCR); in save_early_sprs()
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| D | processor.h | 297 unsigned long dscr; member
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| D | kvm_host.h | 464 ulong dscr; member
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| /linux-4.1.27/arch/powerpc/kernel/ |
| D | sysfs.c | 510 current->thread.dscr = *(unsigned long *)val; in write_dscr()
515 SYSFS_SPRSETUP_SHOW_STORE(dscr);
516 static DEVICE_ATTR(dscr, 0600, show_dscr, store_dscr);
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| D | ptrace.c | 186 *data = task->thread.dscr; in get_user_dscr()
190 static int set_user_dscr(struct task_struct *task, unsigned long dscr) in set_user_dscr() argument
192 task->thread.dscr = dscr; in set_user_dscr()
202 static int set_user_dscr(struct task_struct *task, unsigned long dscr) in set_user_dscr() argument
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| D | process.c | 1216 p->thread.dscr = current->thread.dscr; in copy_thread()
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| D | traps.c | 1089 current->thread.dscr = regs->gpr[rd]; in emulate_instruction()
1091 mtspr(SPRN_DSCR, current->thread.dscr); in emulate_instruction()
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| D | asm-offsets.c | 80 DEFINE(THREAD_DSCR, offsetof(struct thread_struct, dscr)); in main()
522 DEFINE(VCPU_DSCR, offsetof(struct kvm_vcpu, arch.dscr)); in main()
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| /linux-4.1.27/arch/mips/include/asm/mach-au1x00/ |
| D | au1xxx_dbdma.h | 375 u32 au1xxx_dbdma_put_dscr(u32 chanid, au1x_ddma_desc_t *dscr);
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| /linux-4.1.27/arch/powerpc/kvm/ |
| D | book3s_hv.c | 1044 *val = get_reg_val(id, vcpu->arch.dscr); in kvmppc_get_one_reg_hv()
1236 vcpu->arch.dscr = set_reg_val(id, *val); in kvmppc_set_one_reg_hv()
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