Home
last modified time | relevance | path

Searched refs:div_shift (Results 1 – 6 of 6) sorted by relevance

/linux-4.1.27/drivers/clk/rockchip/
Dclk.h207 u8 div_shift; member
229 .div_shift = ds, \
247 .div_shift = ds, \
265 .div_shift = ds, \
305 .div_shift = ds, \
320 .div_shift = 16, \
352 .div_shift = s, \
367 .div_shift = s, \
394 .div_shift = shift, \
Dclk.c44 u8 div_shift, u8 div_width, u8 div_flags, in rockchip_clk_register_branch() argument
89 div->shift = div_shift; in rockchip_clk_register_branch()
237 list->div_shift, list->div_width, in rockchip_clk_register_branches()
244 list->div_shift, list->div_width, in rockchip_clk_register_branches()
267 list->div_shift, list->div_width, in rockchip_clk_register_branches()
277 list->div_shift in rockchip_clk_register_branches()
/linux-4.1.27/arch/arm/mach-imx/
Dclk-pllv3.c44 u32 div_shift; member
102 u32 div = (readl_relaxed(pll->base) >> pll->div_shift) & pll->div_mask; in clk_pllv3_recalc_rate()
130 val &= ~(pll->div_mask << pll->div_shift); in clk_pllv3_set_rate()
131 val |= (div << pll->div_shift); in clk_pllv3_set_rate()
301 pll->div_shift = 1; in imx_clk_pllv3()
/linux-4.1.27/drivers/clk/samsung/
Dclk-s3c2410-dclk.c167 int div_shift, int cmp_shift) in s3c24xx_dclk_update_cmp() argument
176 div = ((dclk_con >> div_shift) & DCLKCON_DCLK_DIV_MASK) + 1; in s3c24xx_dclk_update_cmp()
/linux-4.1.27/drivers/clk/tegra/
Dclk-tegra-periph.c554 u8 div_shift; member
565 .div_shift = _div_shift,\
665 data->div_shift, 8, 1, data->lock); in init_pllp()
/linux-4.1.27/drivers/mfd/
Ddb8500-prcmu.c523 u32 div_shift; member
530 .div_shift = PRCM_DSITVCLK_DIV_DSI0_ESC_CLK_DIV_SHIFT,
535 .div_shift = PRCM_DSITVCLK_DIV_DSI1_ESC_CLK_DIV_SHIFT,
540 .div_shift = PRCM_DSITVCLK_DIV_DSI2_ESC_CLK_DIV_SHIFT,
1629 div = ((div & dsiescclk[n].div_mask) >> (dsiescclk[n].div_shift)); in dsiescclk_rate()
1968 val |= (min(div, (u32)255) << dsiescclk[n].div_shift); in set_dsiescclk_rate()