| /linux-4.1.27/drivers/clocksource/ |
| D | mmio.c | 15 struct clocksource clksrc; member
20 return container_of(c, struct clocksource_mmio, clksrc); in to_mmio_clksrc()
66 cs->clksrc.name = name; in clocksource_mmio_init()
67 cs->clksrc.rating = rating; in clocksource_mmio_init()
68 cs->clksrc.read = read; in clocksource_mmio_init()
69 cs->clksrc.mask = CLOCKSOURCE_MASK(bits); in clocksource_mmio_init()
70 cs->clksrc.flags = CLOCK_SOURCE_IS_CONTINUOUS; in clocksource_mmio_init()
72 return clocksource_register_hz(&cs->clksrc, hz); in clocksource_mmio_init()
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| D | timer-atmel-pit.c | 43 struct clocksource clksrc; member
52 static inline struct pit_data *clksrc_to_pit_data(struct clocksource *clksrc) in clksrc_to_pit_data() argument
54 return container_of(clksrc, struct pit_data, clksrc); in clksrc_to_pit_data()
208 data->clksrc.mask = CLOCKSOURCE_MASK(bits); in at91sam926x_pit_common_init()
209 data->clksrc.name = "pit"; in at91sam926x_pit_common_init()
210 data->clksrc.rating = 175; in at91sam926x_pit_common_init()
211 data->clksrc.read = read_pit_clk, in at91sam926x_pit_common_init()
212 data->clksrc.flags = CLOCK_SOURCE_IS_CONTINUOUS, in at91sam926x_pit_common_init()
213 clocksource_register_hz(&data->clksrc, pit_rate); in at91sam926x_pit_common_init()
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| D | timer-sun5i.c | 52 struct clocksource clksrc; member
56 container_of(x, struct sun5i_timer_clksrc, clksrc)
151 static cycle_t sun5i_clksrc_read(struct clocksource *clksrc) in sun5i_clksrc_read() argument
153 struct sun5i_timer_clksrc *cs = to_sun5i_timer_clksrc(clksrc); in sun5i_clksrc_read()
167 clocksource_unregister(&cs->clksrc); in sun5i_rate_cb_clksrc()
171 clocksource_register_hz(&cs->clksrc, ndata->new_rate); in sun5i_rate_cb_clksrc()
216 cs->clksrc.name = node->name; in sun5i_setup_clocksource()
217 cs->clksrc.rating = 340; in sun5i_setup_clocksource()
218 cs->clksrc.read = sun5i_clksrc_read; in sun5i_setup_clocksource()
219 cs->clksrc.mask = CLOCKSOURCE_MASK(32); in sun5i_setup_clocksource()
[all …]
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| D | tcb_clksrc.c | 64 static struct clocksource clksrc = { variable
315 printk(bootinfo, clksrc.name, CONFIG_ATMEL_TCB_CLKSRC_BLOCK, in tcb_clksrc_init()
321 clksrc.read = tc_get_cycles32; in tcb_clksrc_init()
338 ret = clocksource_register_hz(&clksrc, divided_rate); in tcb_clksrc_init()
350 clocksource_unregister(&clksrc); in tcb_clksrc_init()
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| D | Makefile | 1 obj-$(CONFIG_CLKSRC_OF) += clksrc-of.o
19 obj-$(CONFIG_CLKSRC_DBX500_PRCMU) += clksrc-dbx500-prcmu.o
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| /linux-4.1.27/arch/arm/mach-omap2/ |
| D | timer.c | 363 static struct omap_dm_timer clksrc; variable
371 return (cycle_t)__omap_dm_timer_read_counter(&clksrc, in clocksource_read_cycles()
384 if (clksrc.reserved) in dmtimer_read_sched_clock()
385 return __omap_dm_timer_read_counter(&clksrc, in dmtimer_read_sched_clock()
463 clksrc.id = gptimer_id; in omap2_gptimer_clocksource_init()
464 clksrc.errata = omap_dm_timer_get_errata(); in omap2_gptimer_clocksource_init()
466 res = omap_dm_timer_init_one(&clksrc, fck_source, property, in omap2_gptimer_clocksource_init()
471 __omap_dm_timer_load_start(&clksrc, in omap2_gptimer_clocksource_init()
474 sched_clock_register(dmtimer_read_sched_clock, 32, clksrc.rate); in omap2_gptimer_clocksource_init()
476 if (clocksource_register_hz(&clocksource_gpt, clksrc.rate)) in omap2_gptimer_clocksource_init()
[all …]
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| /linux-4.1.27/arch/m68k/atari/ |
| D | debug.c | 219 int clksrc, clkmode, div, reg3, reg5; in atari_init_scc_port() local
227 clksrc = clksrc_table[baud]; in atari_init_scc_port()
232 clksrc = 0x28; /* TRxC */ in atari_init_scc_port()
252 SCC_WRITE(11, clksrc); /* main clock source */ in atari_init_scc_port()
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| /linux-4.1.27/include/linux/ |
| D | sm501.h | 25 int clksrc, unsigned long freq);
28 int clksrc, unsigned long req_freq);
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| D | clocksource.h | 248 OF_DECLARE_1(clksrc, name, compat, fn)
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| /linux-4.1.27/drivers/net/irda/ |
| D | vlsi_ir.c | 85 static int clksrc = 0; /* default is 0(auto) */ variable
86 module_param(clksrc, int, 0);
87 MODULE_PARM_DESC(clksrc, "clock input source selection");
341 (clksrc>=2) ? ((clksrc==3)?"40MHz XCLK":"48MHz XCLK") in vlsi_seq_show()
342 : ((clksrc==1)?"48MHz PLL":"autodetect")); in vlsi_seq_show()
768 nphyctl = PHYCTL_MIR(clksrc==3); in vlsi_set_baud()
785 nphyctl = PHYCTL_SIR(baudrate,sirpulse,clksrc==3); in vlsi_set_baud()
1146 if (clksrc < 2) { /* auto or PLL: try PLL */ in vlsi_start_clock()
1165 if (clksrc == 1) { /* explicitly asked for PLL hence bail out */ in vlsi_start_clock()
1173 clksrc = 3; /* fallback to 40MHz XCLK (OB800) */ in vlsi_start_clock()
[all …]
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| /linux-4.1.27/sound/soc/fsl/ |
| D | fsl_esai.c | 214 struct clk *clksrc = esai_priv->extalclk; in fsl_esai_set_dai_sysclk() local
238 clksrc = esai_priv->fsysclk; in fsl_esai_set_dai_sysclk()
249 if (IS_ERR(clksrc)) { in fsl_esai_set_dai_sysclk()
252 return PTR_ERR(clksrc); in fsl_esai_set_dai_sysclk()
254 clk_rate = clk_get_rate(clksrc); in fsl_esai_set_dai_sysclk()
272 if (ratio == 1 && clksrc == esai_priv->extalclk) { in fsl_esai_set_dai_sysclk()
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| D | fsl_spdif.c | 351 u8 clksrc = spdif_priv->rxclk_src; in spdif_set_rx_clksrc() local
353 if (clksrc >= SRPC_CLKSRC_MAX || gainsel >= GAINSEL_MULTI_MAX) in spdif_set_rx_clksrc()
358 SRPC_CLKSRC_SEL_SET(clksrc) | SRPC_GAINSEL_SET(gainsel)); in spdif_set_rx_clksrc()
796 u8 clksrc; in spdif_get_rxclk_rate() local
801 clksrc = (phaseconf >> SRPC_CLKSRC_SEL_OFFSET) & 0xf; in spdif_get_rxclk_rate()
804 if (srpc_dpll_locked[clksrc] && (phaseconf & SRPC_DPLL_LOCKED)) in spdif_get_rxclk_rate()
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| /linux-4.1.27/include/video/ |
| D | sh_mipi_dsi.h | 51 u32 clksrc; member
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| /linux-4.1.27/drivers/gpu/drm/shmobile/ |
| D | shmob_drm_drv.c | 71 enum shmob_drm_clk_source clksrc) in shmob_drm_setup_clocks() argument
76 switch (clksrc) { in shmob_drm_setup_clocks()
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| /linux-4.1.27/drivers/mmc/host/ |
| D | sdhci-s3c.c | 113 struct clk *clksrc = ourhost->clk_bus[src]; in sdhci_s3c_consider_clock() local
116 if (IS_ERR(clksrc)) in sdhci_s3c_consider_clock()
124 rate = clk_round_rate(clksrc, wanted); in sdhci_s3c_consider_clock()
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| /linux-4.1.27/drivers/mfd/ |
| D | sm501.c | 510 int clksrc, in sm501_set_clock() argument
527 switch (clksrc) { in sm501_set_clock()
591 clock = clock & ~(0xFF << clksrc); in sm501_set_clock()
592 clock |= reg<<clksrc; in sm501_set_clock()
641 int clksrc, in sm501_find_clock() argument
648 switch (clksrc) { in sm501_find_clock()
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| /linux-4.1.27/drivers/tty/serial/ |
| D | max310x.c | 532 unsigned int div, clksrc, pllcfg = 0; in max310x_set_ref_clk() local
574 clksrc = xtal ? MAX310X_CLKSRC_CRYST_BIT : MAX310X_CLKSRC_EXTCLK_BIT; in max310x_set_ref_clk()
578 clksrc |= MAX310X_CLKSRC_PLL_BIT; in max310x_set_ref_clk()
581 clksrc |= MAX310X_CLKSRC_PLLBYP_BIT; in max310x_set_ref_clk()
583 regmap_write(s->regmap, MAX310X_CLKSRC_REG, clksrc); in max310x_set_ref_clk()
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| /linux-4.1.27/drivers/video/fbdev/ |
| D | sh_mipi_dsi.c | 280 (pdata->clksrc << 16) | (pctype << 12) | datatype, in sh_mipi_setup()
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| /linux-4.1.27/include/asm-generic/ |
| D | vmlinux.lds.h | 175 #define CLKSRC_OF_TABLES() OF_TABLE(CONFIG_CLKSRC_OF, clksrc)
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| /linux-4.1.27/ |
| D | MAINTAINERS | 1548 F: drivers/clocksource/clksrc-dbx500-prcmu.c
|