Home
last modified time | relevance | path

Searched refs:cacheline_size (Results 1 – 18 of 18) sorted by relevance

/linux-4.1.27/arch/sparc/include/asm/
Dpci_64.h39 unsigned long cacheline_size; in pci_dma_burst_advice() local
44 cacheline_size = 1024; in pci_dma_burst_advice()
46 cacheline_size = (int) byte * 4; in pci_dma_burst_advice()
49 *strategy_parameter = cacheline_size; in pci_dma_burst_advice()
/linux-4.1.27/arch/ia64/include/asm/
Dpci.h60 unsigned long cacheline_size; in pci_dma_burst_advice() local
65 cacheline_size = 1024; in pci_dma_burst_advice()
67 cacheline_size = (int) byte * 4; in pci_dma_burst_advice()
70 *strategy_parameter = cacheline_size; in pci_dma_burst_advice()
/linux-4.1.27/arch/alpha/include/asm/
Dpci.h78 unsigned long cacheline_size; in pci_dma_burst_advice() local
83 cacheline_size = 1024; in pci_dma_burst_advice()
85 cacheline_size = (int) byte * 4; in pci_dma_burst_advice()
88 *strategy_parameter = cacheline_size; in pci_dma_burst_advice()
/linux-4.1.27/arch/parisc/include/asm/
Dpci.h204 unsigned long cacheline_size; in pci_dma_burst_advice() local
209 cacheline_size = 1024; in pci_dma_burst_advice()
211 cacheline_size = (int) byte * 4; in pci_dma_burst_advice()
214 *strategy_parameter = cacheline_size; in pci_dma_burst_advice()
/linux-4.1.27/arch/sh/include/asm/
Dpci.h94 unsigned long cacheline_size; in pci_dma_burst_advice() local
100 cacheline_size = L1_CACHE_BYTES; in pci_dma_burst_advice()
102 cacheline_size = byte << 2; in pci_dma_burst_advice()
105 *strategy_parameter = cacheline_size; in pci_dma_burst_advice()
/linux-4.1.27/arch/powerpc/include/asm/
Dpci.h79 unsigned long cacheline_size; in pci_dma_burst_advice() local
84 cacheline_size = 1024; in pci_dma_burst_advice()
86 cacheline_size = (int) byte * 4; in pci_dma_burst_advice()
89 *strategy_parameter = cacheline_size; in pci_dma_burst_advice()
/linux-4.1.27/drivers/firmware/
Dqcom_scm.c240 u32 cacheline_size, ctr; in qcom_scm_inv_range() local
243 cacheline_size = 4 << ((ctr >> 16) & 0xf); in qcom_scm_inv_range()
245 start = round_down(start, cacheline_size); in qcom_scm_inv_range()
246 end = round_up(end, cacheline_size); in qcom_scm_inv_range()
251 start += cacheline_size; in qcom_scm_inv_range()
/linux-4.1.27/drivers/gpu/drm/amd/amdkfd/
Dkfd_topology.h106 uint32_t cacheline_size; member
Dkfd_topology.c241 props->cacheline_size = cache->cache_line_size; in kfd_parse_subtype_cache()
607 sysfs_show_32bit_prop(buffer, "cache_line_size", cache->cacheline_size); in kfd_cache_show()
/linux-4.1.27/drivers/gpu/drm/i915/
Dintel_pm.c465 .cacheline_size = PINEVIEW_FIFO_LINE_SIZE,
472 .cacheline_size = PINEVIEW_FIFO_LINE_SIZE,
479 .cacheline_size = PINEVIEW_FIFO_LINE_SIZE,
486 .cacheline_size = PINEVIEW_FIFO_LINE_SIZE,
493 .cacheline_size = G4X_FIFO_LINE_SIZE,
500 .cacheline_size = G4X_FIFO_LINE_SIZE,
507 .cacheline_size = G4X_FIFO_LINE_SIZE,
514 .cacheline_size = G4X_FIFO_LINE_SIZE,
521 .cacheline_size = I915_FIFO_LINE_SIZE,
528 .cacheline_size = I915_FIFO_LINE_SIZE,
[all …]
Dintel_drv.h549 unsigned long cacheline_size; member
/linux-4.1.27/tools/perf/util/
Dutil.h283 extern int cacheline_size;
Dutil.c30 int cacheline_size; variable
Dsort.c832 return (address & ~(cacheline_size - 1)); in cl_address()
/linux-4.1.27/drivers/pci/
Dpci.c2863 u8 cacheline_size; in pci_set_cacheline_size() local
2870 pci_read_config_byte(dev, PCI_CACHE_LINE_SIZE, &cacheline_size); in pci_set_cacheline_size()
2871 if (cacheline_size >= pci_cache_line_size && in pci_set_cacheline_size()
2872 (cacheline_size % pci_cache_line_size) == 0) in pci_set_cacheline_size()
2878 pci_read_config_byte(dev, PCI_CACHE_LINE_SIZE, &cacheline_size); in pci_set_cacheline_size()
2879 if (cacheline_size == pci_cache_line_size) in pci_set_cacheline_size()
/linux-4.1.27/tools/perf/
Dperf.c515 cacheline_size = sysconf(_SC_LEVEL1_DCACHE_LINESIZE); in main()
/linux-4.1.27/tools/lguest/
Dlguest.c146 u8 cacheline_size, lat_timer, header_type, bist; member
1387 } else if (&d->config_words[reg] == (void *)&d->config.cacheline_size) { in pci_data_iowrite()
/linux-4.1.27/drivers/net/ethernet/broadcom/
Dtg3.c17025 int cacheline_size; in tg3_calc_dma_bndry() local
17031 cacheline_size = 1024; in tg3_calc_dma_bndry()
17033 cacheline_size = (int) byte * 4; in tg3_calc_dma_bndry()
17073 switch (cacheline_size) { in tg3_calc_dma_bndry()
17098 switch (cacheline_size) { in tg3_calc_dma_bndry()
17115 switch (cacheline_size) { in tg3_calc_dma_bndry()