| H A D | bnx2x_link.c | 208 bnx2x_cl45_write(_bp, _phy, \
2748 static int bnx2x_cl45_write(struct bnx2x *bp, struct bnx2x_phy *phy, bnx2x_cl45_write() function
2968 bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, MDIO_AN_REG_EEE_ADV, 0x0); bnx2x_eee_disable()
2994 bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, MDIO_AN_REG_EEE_ADV, val); bnx2x_eee_advertise()
3180 bnx2x_cl45_write(bp, phy, devad, reg, val | or_val); bnx2x_cl45_read_or_write()
3189 bnx2x_cl45_write(bp, phy, devad, reg, val & and_val); bnx2x_cl45_read_and_write()
3218 return bnx2x_cl45_write(params->bp, bnx2x_phy_write()
3488 bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, MDIO_AN_REG_ADV_PAUSE, val); bnx2x_ext_phy_set_pause()
3644 bnx2x_cl45_write(bp, phy, reg_set[i].devad, reg_set[i].reg, bnx2x_warpcore_enable_AN_KR2()
3679 bnx2x_cl45_write(bp, phy, reg_set[i].devad, reg_set[i].reg, bnx2x_disable_kr2()
3693 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_lpi_passthrough()
3707 bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, bnx2x_warpcore_restart_AN_KR()
3733 bnx2x_cl45_write(bp, phy, reg_set[i].devad, reg_set[i].reg, bnx2x_warpcore_enable_AN_KR()
3740 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_enable_AN_KR()
3763 bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, bnx2x_warpcore_enable_AN_KR()
3771 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_enable_AN_KR()
3776 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_enable_AN_KR()
3779 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_enable_AN_KR()
3782 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_enable_AN_KR()
3787 bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, bnx2x_warpcore_enable_AN_KR()
3791 bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, bnx2x_warpcore_enable_AN_KR()
3814 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_enable_AN_KR()
3828 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_enable_AN_KR()
3835 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_enable_AN_KR()
3855 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_enable_AN_KR()
3886 bnx2x_cl45_write(bp, phy, reg_set[i].devad, reg_set[i].reg, bnx2x_warpcore_set_10G_KR()
3897 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_10G_KR()
3903 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_10G_KR()
3908 bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, bnx2x_warpcore_set_10G_KR()
3911 bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, bnx2x_warpcore_set_10G_KR()
3915 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_10G_KR()
3919 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_10G_KR()
3927 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_10G_KR()
3929 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_10G_KR()
3952 bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, MDIO_AN_REG_CTRL, 0); bnx2x_warpcore_set_10G_XFI()
3974 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_10G_XFI()
4035 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_10G_XFI()
4040 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_10G_XFI()
4043 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_10G_XFI()
4058 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_10G_XFI()
4087 bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, bnx2x_warpcore_set_20G_force_KR2()
4094 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_20G_force_KR2()
4108 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_20G_force_KR2()
4110 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_20G_force_KR2()
4128 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_20G_DXGXS()
4132 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_20G_DXGXS()
4135 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_20G_DXGXS()
4138 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_20G_DXGXS()
4141 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_20G_DXGXS()
4144 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_20G_DXGXS()
4147 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_20G_DXGXS()
4150 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_20G_DXGXS()
4153 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_20G_DXGXS()
4156 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_20G_DXGXS()
4160 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_20G_DXGXS()
4164 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_20G_DXGXS()
4168 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_20G_DXGXS()
4172 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_20G_DXGXS()
4219 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_sgmii_speed()
4237 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_sgmii_speed()
4244 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_sgmii_speed()
4249 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_sgmii_speed()
4254 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_sgmii_speed()
4271 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_reset_lane()
4304 bnx2x_cl45_write(bp, phy, wc_regs[i].devad, wc_regs[i].reg, bnx2x_warpcore_clear_regs()
4308 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_clear_regs()
4421 bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, bnx2x_warpcore_config_runtime()
4619 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_link_reset()
4631 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_link_reset()
4665 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_set_warpcore_loopback()
6255 bnx2x_cl45_write(bp, phy, bnx2x_set_xgxs_loopback()
6261 bnx2x_cl45_write(bp, phy, bnx2x_set_xgxs_loopback()
6282 bnx2x_cl45_write(bp, phy, 5, bnx2x_set_xgxs_loopback()
7147 bnx2x_cl45_write(bp, phy, bnx2x_8073_8727_external_rom_boot()
7153 bnx2x_cl45_write(bp, phy, bnx2x_8073_8727_external_rom_boot()
7158 bnx2x_cl45_write(bp, phy, bnx2x_8073_8727_external_rom_boot()
7163 bnx2x_cl45_write(bp, phy, bnx2x_8073_8727_external_rom_boot()
7169 bnx2x_cl45_write(bp, phy, bnx2x_8073_8727_external_rom_boot()
7202 bnx2x_cl45_write(bp, phy, bnx2x_8073_8727_external_rom_boot()
7303 bnx2x_cl45_write(bp, phy, bnx2x_807x_force_10G()
7305 bnx2x_cl45_write(bp, phy, bnx2x_807x_force_10G()
7307 bnx2x_cl45_write(bp, phy, bnx2x_807x_force_10G()
7309 bnx2x_cl45_write(bp, phy, bnx2x_807x_force_10G()
7343 bnx2x_cl45_write(bp, phy, bnx2x_8073_set_pause_cl37()
7356 bnx2x_cl45_write(bp, phy, bnx2x_8073_specific_func()
7358 bnx2x_cl45_write(bp, phy, bnx2x_8073_specific_func()
7403 bnx2x_cl45_write(bp, phy, bnx2x_8073_config_init()
7419 bnx2x_cl45_write(bp, phy, bnx2x_8073_config_init()
7429 bnx2x_cl45_write(bp, phy, bnx2x_8073_config_init()
7456 bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, MDIO_AN_REG_ADV, val); bnx2x_8073_config_init()
7477 bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, MDIO_AN_REG_8073_2_5G, tmp1); bnx2x_8073_config_init()
7481 bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, MDIO_AN_REG_CL37_FC_LD, bnx2x_8073_config_init()
7486 bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, MDIO_AN_REG_CL37_AN, 0x1000); bnx2x_8073_config_init()
7493 bnx2x_cl45_write(bp, phy, bnx2x_8073_config_init()
7500 bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, MDIO_AN_REG_ADV2, tmp1); bnx2x_8073_config_init()
7506 bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, MDIO_AN_REG_CTRL, 0x1200); bnx2x_8073_config_init()
7579 bnx2x_cl45_write(bp, phy, bnx2x_8073_read_status()
7584 bnx2x_cl45_write(bp, phy, bnx2x_8073_read_status()
7632 bnx2x_cl45_write(bp, phy, bnx2x_8073_read_status()
7687 bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, MDIO_PMA_REG_CTRL, 0xa040); bnx2x_8705_config_init()
7690 bnx2x_cl45_write(bp, phy, bnx2x_8705_config_init()
7692 bnx2x_cl45_write(bp, phy, bnx2x_8705_config_init()
7694 bnx2x_cl45_write(bp, phy, bnx2x_8705_config_init()
7696 bnx2x_cl45_write(bp, phy, bnx2x_8705_config_init()
7757 bnx2x_cl45_write(bp, phy, bnx2x_set_disable_pmd_transmit()
7805 bnx2x_cl45_write(bp, phy, bnx2x_sfp_e1e2_set_transmitter()
7859 bnx2x_cl45_write(bp, phy, bnx2x_8726_read_sfp_module_eeprom()
7864 bnx2x_cl45_write(bp, phy, bnx2x_8726_read_sfp_module_eeprom()
7869 bnx2x_cl45_write(bp, phy, bnx2x_8726_read_sfp_module_eeprom()
7992 bnx2x_cl45_write(bp, phy, bnx2x_8727_read_sfp_module_eeprom()
8004 bnx2x_cl45_write(bp, phy, bnx2x_8727_read_sfp_module_eeprom()
8010 bnx2x_cl45_write(bp, phy, bnx2x_8727_read_sfp_module_eeprom()
8015 bnx2x_cl45_write(bp, phy, bnx2x_8727_read_sfp_module_eeprom()
8021 bnx2x_cl45_write(bp, phy, bnx2x_8727_read_sfp_module_eeprom()
8387 bnx2x_cl45_write(bp, phy, bnx2x_8727_power_module()
8408 bnx2x_cl45_write(bp, phy, bnx2x_8726_set_limiting_mode()
8422 bnx2x_cl45_write(bp, phy, bnx2x_8726_set_limiting_mode()
8426 bnx2x_cl45_write(bp, phy, bnx2x_8726_set_limiting_mode()
8430 bnx2x_cl45_write(bp, phy, bnx2x_8726_set_limiting_mode()
8434 bnx2x_cl45_write(bp, phy, bnx2x_8726_set_limiting_mode()
8453 bnx2x_cl45_write(bp, phy, bnx2x_8727_set_limiting_mode()
8463 bnx2x_cl45_write(bp, phy, bnx2x_8727_set_limiting_mode()
8468 bnx2x_cl45_write(bp, phy, bnx2x_8727_set_limiting_mode()
8491 bnx2x_cl45_write(bp, phy, bnx2x_8727_specific_func()
8494 bnx2x_cl45_write(bp, phy, bnx2x_8727_specific_func()
8497 bnx2x_cl45_write(bp, phy, bnx2x_8727_specific_func()
8511 bnx2x_cl45_write(bp, phy, bnx2x_8727_specific_func()
8645 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_limiting_mode()
8820 bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, alarm_ctrl_offset, val); bnx2x_sfp_mask_fault()
8899 bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, MDIO_PMA_REG_CTRL, 0xa040); bnx2x_8706_config_init()
8926 bnx2x_cl45_write(bp, phy, MDIO_XS_DEVAD, reg, val); bnx2x_8706_config_init()
8933 bnx2x_cl45_write(bp, phy, bnx2x_8706_config_init()
8936 bnx2x_cl45_write(bp, phy, bnx2x_8706_config_init()
8940 bnx2x_cl45_write(bp, phy, bnx2x_8706_config_init()
8947 bnx2x_cl45_write(bp, phy, bnx2x_8706_config_init()
8951 bnx2x_cl45_write(bp, phy, bnx2x_8706_config_init()
8954 bnx2x_cl45_write(bp, phy, bnx2x_8706_config_init()
8957 bnx2x_cl45_write(bp, phy, bnx2x_8706_config_init()
8961 bnx2x_cl45_write(bp, phy, bnx2x_8706_config_init()
8963 bnx2x_cl45_write(bp, phy, bnx2x_8706_config_init()
8966 bnx2x_cl45_write(bp, phy, bnx2x_8706_config_init()
8986 bnx2x_cl45_write(bp, phy, bnx2x_8706_config_init()
9008 bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, MDIO_PMA_REG_CTRL, 0x0001); bnx2x_8726_config_loopback()
9019 bnx2x_cl45_write(bp, phy, bnx2x_8726_external_rom_boot()
9023 bnx2x_cl45_write(bp, phy, bnx2x_8726_external_rom_boot()
9028 bnx2x_cl45_write(bp, phy, bnx2x_8726_external_rom_boot()
9032 bnx2x_cl45_write(bp, phy, bnx2x_8726_external_rom_boot()
9041 bnx2x_cl45_write(bp, phy, bnx2x_8726_external_rom_boot()
9077 bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, MDIO_PMA_REG_CTRL, 1<<15); bnx2x_8726_config_init()
9091 bnx2x_cl45_write(bp, phy, bnx2x_8726_config_init()
9093 bnx2x_cl45_write(bp, phy, bnx2x_8726_config_init()
9095 bnx2x_cl45_write(bp, phy, bnx2x_8726_config_init()
9097 bnx2x_cl45_write(bp, phy, bnx2x_8726_config_init()
9109 bnx2x_cl45_write(bp, phy, bnx2x_8726_config_init()
9111 bnx2x_cl45_write(bp, phy, bnx2x_8726_config_init()
9113 bnx2x_cl45_write(bp, phy, bnx2x_8726_config_init()
9115 bnx2x_cl45_write(bp, phy, bnx2x_8726_config_init()
9117 bnx2x_cl45_write(bp, phy, bnx2x_8726_config_init()
9122 bnx2x_cl45_write(bp, phy, bnx2x_8726_config_init()
9124 bnx2x_cl45_write(bp, phy, bnx2x_8726_config_init()
9129 bnx2x_cl45_write(bp, phy, bnx2x_8726_config_init()
9140 bnx2x_cl45_write(bp, phy, bnx2x_8726_config_init()
9145 bnx2x_cl45_write(bp, phy, bnx2x_8726_config_init()
9161 bnx2x_cl45_write(bp, phy, bnx2x_8726_link_reset()
9201 bnx2x_cl45_write(bp, phy, bnx2x_8727_set_link_led()
9211 bnx2x_cl45_write(bp, phy, bnx2x_8727_set_link_led()
9240 bnx2x_cl45_write(bp, phy, bnx2x_8727_config_speed()
9242 bnx2x_cl45_write(bp, phy, bnx2x_8727_config_speed()
9255 bnx2x_cl45_write(bp, phy, bnx2x_8727_config_speed()
9267 bnx2x_cl45_write(bp, phy, bnx2x_8727_config_speed()
9269 bnx2x_cl45_write(bp, phy, bnx2x_8727_config_speed()
9275 bnx2x_cl45_write(bp, phy, bnx2x_8727_config_speed()
9278 bnx2x_cl45_write(bp, phy, bnx2x_8727_config_speed()
9280 bnx2x_cl45_write(bp, phy, bnx2x_8727_config_speed()
9282 bnx2x_cl45_write(bp, phy, bnx2x_8727_config_speed()
9314 bnx2x_cl45_write(bp, phy, bnx2x_8727_config_init()
9337 bnx2x_cl45_write(bp, phy, bnx2x_8727_config_init()
9341 bnx2x_cl45_write(bp, phy, bnx2x_8727_config_init()
9361 bnx2x_cl45_write(bp, phy, bnx2x_8727_config_init()
9366 bnx2x_cl45_write(bp, phy, bnx2x_8727_config_init()
9402 bnx2x_cl45_write(bp, phy, bnx2x_8727_handle_mod_abs()
9427 bnx2x_cl45_write(bp, phy, bnx2x_8727_handle_mod_abs()
9519 bnx2x_cl45_write(bp, phy, bnx2x_8727_read_status()
9528 bnx2x_cl45_write(bp, phy, bnx2x_8727_read_status()
9544 bnx2x_cl45_write(bp, phy, bnx2x_8727_read_status()
9611 bnx2x_cl45_write(bp, phy, bnx2x_8727_read_status()
9629 bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, MDIO_PMA_LASI_CTRL, 0); bnx2x_8727_link_reset()
9659 bnx2x_cl45_write(bp, phy, reg_set[i].devad, bnx2x_save_848xx_spirom_version()
9678 bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA819, 0x0000); bnx2x_save_848xx_spirom_version()
9679 bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA81A, 0xc200); bnx2x_save_848xx_spirom_version()
9680 bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA817, 0x000A); bnx2x_save_848xx_spirom_version()
9725 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_led()
9730 bnx2x_cl45_write(bp, phy, reg_set[i].devad, reg_set[i].reg, bnx2x_848xx_set_led()
9777 bnx2x_cl45_write(bp, phy, bnx2x_848xx_cmn_config_init()
9809 bnx2x_cl45_write(bp, phy, bnx2x_848xx_cmn_config_init()
9857 bnx2x_cl45_write(bp, phy, bnx2x_848xx_cmn_config_init()
9869 bnx2x_cl45_write(bp, phy, bnx2x_848xx_cmn_config_init()
9875 bnx2x_cl45_write(bp, phy, bnx2x_848xx_cmn_config_init()
9888 bnx2x_cl45_write(bp, phy, bnx2x_848xx_cmn_config_init()
9904 bnx2x_cl45_write(bp, phy, bnx2x_848xx_cmn_config_init()
9908 bnx2x_cl45_write(bp, phy, bnx2x_848xx_cmn_config_init()
9929 bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, MDIO_PMA_REG_CTRL, 1<<15); bnx2x_8481_config_init()
9943 bnx2x_cl45_write(bp, phy, MDIO_CTL_DEVAD, bnx2x_84833_cmd_hdlr()
9960 bnx2x_cl45_write(bp, phy, MDIO_CTL_DEVAD, bnx2x_84833_cmd_hdlr()
9964 bnx2x_cl45_write(bp, phy, MDIO_CTL_DEVAD, bnx2x_84833_cmd_hdlr()
9985 bnx2x_cl45_write(bp, phy, MDIO_CTL_DEVAD, bnx2x_84833_cmd_hdlr()
10070 bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, bnx2x_84833_hw_reset_phy()
10073 bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, bnx2x_84833_hw_reset_phy()
10155 bnx2x_cl45_write(bp, phy, bnx2x_848x3_config_init()
10216 bnx2x_cl45_write(bp, phy, MDIO_CTL_DEVAD, bnx2x_848x3_config_init()
10253 bnx2x_cl45_write(bp, phy, MDIO_CTL_DEVAD, bnx2x_848x3_config_init()
10325 bnx2x_cl45_write(bp, phy, bnx2x_848xx_read_status()
10448 bnx2x_cl45_write(params->bp, phy, bnx2x_8481_link_reset()
10450 bnx2x_cl45_write(params->bp, phy, bnx2x_8481_link_reset()
10475 bnx2x_cl45_write(bp, phy, bnx2x_848x3_link_reset()
10502 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_link_led()
10507 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_link_led()
10512 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_link_led()
10517 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_link_led()
10523 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_link_led()
10538 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_link_led()
10543 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_link_led()
10548 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_link_led()
10553 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_link_led()
10559 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_link_led()
10580 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_link_led()
10601 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_link_led()
10607 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_link_led()
10612 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_link_led()
10617 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_link_led()
10622 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_link_led()
10627 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_link_led()
10648 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_link_led()
10673 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_link_led()
10680 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_link_led()
10685 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_link_led()
10690 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_link_led()
10695 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_link_led()
10709 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_link_led()
10721 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_link_led()
10730 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_link_led()
10974 bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, bnx2x_54618se_config_init()
11209 bnx2x_cl45_write(bp, phy, bnx2x_7101_config_loopback()
11228 bnx2x_cl45_write(bp, phy, bnx2x_7101_config_init()
11231 bnx2x_cl45_write(bp, phy, bnx2x_7101_config_init()
11239 bnx2x_cl45_write(bp, phy, bnx2x_7101_config_init()
11317 bnx2x_cl45_write(bp, phy, bnx2x_sfx7101_sp_sw_reset()
11358 bnx2x_cl45_write(bp, phy, bnx2x_7101_set_link_led()
12949 bnx2x_cl45_write(bp, &phy[port], bnx2x_8073_common_init_phy()
12985 bnx2x_cl45_write(bp, phy_blk[port], bnx2x_8073_common_init_phy()
13004 bnx2x_cl45_write(bp, phy_blk[port], bnx2x_8073_common_init_phy()
13013 bnx2x_cl45_write(bp, phy_blk[port], bnx2x_8073_common_init_phy()
13060 bnx2x_cl45_write(bp, &phy, bnx2x_8726_common_init_phy()
13184 bnx2x_cl45_write(bp, &phy[port], bnx2x_8727_common_init_phy()
13209 bnx2x_cl45_write(bp, phy_blk[port], bnx2x_8727_common_init_phy()
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