Searched refs:bXCTxAGC (Results 1 - 10 of 10) sorted by relevance

/linux-4.1.27/drivers/staging/rtl8192e/rtl8192e/
H A Dr8192E_phy.c592 (bXBTxAGC|bXCTxAGC|bXDTxAGC), dwRegValue); rtl8192_BB_Config_ParaFile()
675 (bXBTxAGC|bXCTxAGC|bXDTxAGC), u4RegValue); rtl8192_phy_setTxPower()
H A Dr8192E_phyreg.h286 #define bXCTxAGC 0xf000 macro
H A Dr819xE_phyreg.h302 #define bXCTxAGC 0xf000 macro
/linux-4.1.27/drivers/staging/rtl8192u/
H A Dr819xU_phyreg.h284 #define bXCTxAGC 0xf000 macro
H A Dr819xU_phy.c828 rtl8192_setBBreg(dev, rFPGA0_TxGainStage, (bXBTxAGC|bXCTxAGC), rtl8192_BB_Config_ParaFile()
/linux-4.1.27/drivers/staging/rtl8712/
H A Drtl871x_mp.c334 (bXBTxAGC|bXCTxAGC|bXDTxAGC), tmpAGC); r8712_SetTxAGCOffset()
H A Drtl871x_mp_phy_regdef.h433 #define bXCTxAGC 0xf000 macro
/linux-4.1.27/drivers/staging/rtl8723au/include/
H A DHal8723APhyReg.h452 #define bXCTxAGC 0xf000 macro
/linux-4.1.27/drivers/staging/rtl8188eu/include/
H A DHal8188EPhyReg.h519 #define bXCTxAGC 0xf000 macro
H A Drtw_mp_phy_regdef.h461 #define bXCTxAGC 0xf000 macro

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