| /linux-4.1.27/drivers/staging/rtl8188eu/hal/ |
| D | odm_RTL8188E.c | 142 phy_set_bb_reg(adapter, 0x914, bMaskByte1, 2); in dm_fast_training_init()
157 phy_set_bb_reg(adapter, 0x914, bMaskByte1, 1); in dm_fast_training_init()
161 phy_set_bb_reg(adapter, 0x918, bMaskByte1, 5); in dm_fast_training_init()
|
| D | rf.c | 119 phy_set_bb_reg(adapt, rTxAGC_A_CCK1_Mcs32, bMaskByte1, tmpval); in rtl88eu_phy_rf6052_set_cck_txpower()
|
| /linux-4.1.27/drivers/staging/rtl8192u/ |
| D | r819xU_phy.h | 53 #define bMaskByte1 0xff00 macro
|
| D | r8192U_dm.c | 1549 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8); /* Only clear byte 1 and rewrite. */ in dm_bb_initialgain_restore()
1564 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1); /* Only clear byte 1 and rewrite. */ in dm_bb_initialgain_restore()
1589 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8); /* Only clear byte 1 and rewrite. */ in dm_bb_initialgain_backup()
1763 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8); /* Only clear byte 1 and rewrite. */ in dm_ctrl_initgain_byrssi_by_driverrssi()
1802 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1); /* Only clear byte 1 and rewrite.*/ in dm_ctrl_initgain_byrssi_by_fwfalse_alarm()
1835 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8); /* Only clear byte 1 and rewrite. */ in dm_ctrl_initgain_byrssi_by_fwfalse_alarm()
1929 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1); /* Only clear byte 1 and rewrite. */ in dm_ctrl_initgain_byrssi_by_fwfalse_alarm()
|
| D | r819xU_phy.c | 1721 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8); in InitialGainOperateWorkItemCallBack()
1760 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8); in InitialGainOperateWorkItemCallBack()
1789 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1); in InitialGainOperateWorkItemCallBack()
|
| D | r819xU_phyreg.h | 823 #define bMaskByte1 0xff00 macro
|
| /linux-4.1.27/drivers/staging/rtl8192e/rtl8192e/ |
| D | r8192E_phy.h | 69 #define bMaskByte1 0xff00 macro
|
| D | rtl_dm.c | 1596 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8); in dm_bb_initialgain_restore()
1609 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1); in dm_bb_initialgain_restore()
1633 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8); in dm_bb_initialgain_backup()
1782 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8); in dm_ctrl_initgain_byrssi_by_driverrssi()
1817 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1); in dm_ctrl_initgain_byrssi_by_fwfalse_alarm()
1836 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8); in dm_ctrl_initgain_byrssi_by_fwfalse_alarm()
1887 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1); in dm_ctrl_initgain_byrssi_by_fwfalse_alarm()
|
| D | r819xE_phyreg.h | 858 #define bMaskByte1 0xff00 macro
|
| D | r8192E_phyreg.h | 806 #define bMaskByte1 0xff00 macro
|
| D | r8192E_phy.c | 1316 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8); in InitialGain819xPci()
1365 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8); in InitialGain819xPci()
1400 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1); in InitialGain819xPci()
|
| /linux-4.1.27/drivers/staging/rtl8723au/hal/ |
| D | rtl8723a_rf6052.c | 180 PHY_SetBBReg(Adapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, tmpval); in rtl823a_phy_rf6052setccktxpower()
|
| /linux-4.1.27/drivers/staging/rtl8712/ |
| D | rtl871x_mp_phy_regdef.h | 958 #define bMaskByte1 0xff00 macro
|
| /linux-4.1.27/drivers/staging/rtl8188eu/include/ |
| D | Hal8188EPhyReg.h | 1047 #define bMaskByte1 0xff00 macro
|
| D | rtw_mp_phy_regdef.h | 1012 #define bMaskByte1 0xff00 macro
|
| /linux-4.1.27/drivers/staging/rtl8723au/include/ |
| D | Hal8723APhyReg.h | 984 #define bMaskByte1 0xff00 macro
|