Searched refs:apic_base (Results 1 – 9 of 9) sorted by relevance
118 return apic->vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE; in kvm_apic_hw_enabled()143 return apic->vcpu->arch.apic_base & X2APIC_ENABLE; in apic_x2apic_mode()
1457 if (!(vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE)) in kvm_free_lapic()1524 u64 old_value = vcpu->arch.apic_base; in kvm_lapic_set_base()1529 vcpu->arch.apic_base = value; in kvm_lapic_set_base()1533 vcpu->arch.apic_base = value; in kvm_lapic_set_base()1554 apic->base_address = apic->vcpu->arch.apic_base & in kvm_lapic_set_base()1563 "0x%lx.\n", apic->vcpu->arch.apic_base, apic->base_address); in kvm_lapic_set_base()1611 vcpu->arch.apic_base | MSR_IA32_APICBASE_BSP); in kvm_lapic_reset()1621 vcpu->arch.apic_base, apic->base_address); in kvm_lapic_reset()1717 vcpu->arch.apic_base = MSR_IA32_APICBASE_ENABLE; in kvm_create_lapic()1802 kvm_lapic_set_base(vcpu, vcpu->arch.apic_base); in kvm_apic_post_state_restore()
271 return vcpu->arch.apic_base; in kvm_get_apic_base()277 u64 old_state = vcpu->arch.apic_base & in kvm_set_apic_base()6045 kvm_run->apic_base = kvm_get_apic_base(vcpu); in post_kvm_run_save()6758 sregs->apic_base = kvm_get_apic_base(vcpu); in kvm_arch_vcpu_ioctl_get_sregs()6846 apic_base_msr.data = sregs->apic_base; in kvm_arch_vcpu_ioctl_set_sregs()
1266 svm->vcpu.arch.apic_base = APIC_DEFAULT_PHYS_BASE | in svm_create_vcpu()1269 svm->vcpu.arch.apic_base |= MSR_IA32_APICBASE_BSP; in svm_create_vcpu()
150 __u64 apic_base; member
209 __u64 apic_base; member
1004 return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0; in kvm_vcpu_is_bsp()
365 u64 apic_base; member
346 __u64 apic_base;3024 __u64 apic_base;