Home
last modified time | relevance | path

Searched refs:_bit (Results 1 – 25 of 25) sorted by relevance

/linux-4.1.27/drivers/reset/sti/
Dreset-stih415.c28 #define STIH415_PDN_FRONT(_bit) \ argument
29 _SYSCFG_RST_CH(stih415_front, SYSCFG_114, _bit, SYSSTAT_187, _bit)
34 #define STIH415_SRST_REAR(_reg, _bit) \ argument
35 _SYSCFG_RST_CH_NO_ACK(stih415_rear, _reg, _bit)
37 #define STIH415_SRST_SBC(_reg, _bit) \ argument
38 _SYSCFG_RST_CH_NO_ACK(stih415_sbc, _reg, _bit)
40 #define STIH415_SRST_FRONT(_reg, _bit) \ argument
41 _SYSCFG_RST_CH_NO_ACK(stih415_front, _reg, _bit)
43 #define STIH415_SRST_LPM(_reg, _bit) \ argument
44 _SYSCFG_RST_CH_NO_ACK(stih415_lpm, _reg, _bit)
Dreset-stih407.c22 #define STIH407_PDN_0(_bit) \ argument
23 _SYSCFG_RST_CH(stih407_core, SYSCFG_5000, _bit, SYSSTAT_5500, _bit)
24 #define STIH407_PDN_1(_bit) \ argument
25 _SYSCFG_RST_CH(stih407_core, SYSCFG_5001, _bit, SYSSTAT_5501, _bit)
26 #define STIH407_PDN_ETH(_bit, _stat) \ argument
27 _SYSCFG_RST_CH(stih407_sbc_reg, SYSCFG_4032, _bit, SYSSTAT_4520, _stat)
60 #define STIH407_SRST_CORE(_reg, _bit) \ argument
61 _SYSCFG_RST_CH_NO_ACK(stih407_core, _reg, _bit)
63 #define STIH407_SRST_SBC(_reg, _bit) \ argument
64 _SYSCFG_RST_CH_NO_ACK(stih407_sbc_reg, _reg, _bit)
[all …]
Dreset-stih416.c29 #define STIH416_PDN_FRONT(_bit) \ argument
30 _SYSCFG_RST_CH(stih416_front, SYSCFG_1500, _bit, SYSSTAT_1578, _bit)
49 #define STIH416_SRST_CPU(_reg, _bit) \ argument
50 _SYSCFG_RST_CH_NO_ACK(stih416_cpu, _reg, _bit)
52 #define STIH416_SRST_FRONT(_reg, _bit) \ argument
53 _SYSCFG_RST_CH_NO_ACK(stih416_front, _reg, _bit)
55 #define STIH416_SRST_REAR(_reg, _bit) \ argument
56 _SYSCFG_RST_CH_NO_ACK(stih416_rear, _reg, _bit)
58 #define STIH416_SRST_LPM(_reg, _bit) \ argument
59 _SYSCFG_RST_CH_NO_ACK(stih416_lpm, _reg, _bit)
[all …]
/linux-4.1.27/arch/arc/include/asm/
Dbitops.h32 static inline void op##_bit(unsigned long nr, volatile unsigned long *m)\
78 static inline int test_and_##op##_bit(unsigned long nr, volatile unsigned long *m)\
125 static inline void op##_bit(unsigned long nr, volatile unsigned long *m)\
142 static inline int test_and_##op##_bit(unsigned long nr, volatile unsigned long *m)\
164 static inline void __##op##_bit(unsigned long nr, volatile unsigned long *m) \
174 static inline int __test_and_##op##_bit(unsigned long nr, volatile unsigned long *m)\
/linux-4.1.27/drivers/clk/bcm/
Dclk-kona.h99 #define POLICY(_offset, _bit) \ argument
102 .bit = (_bit), \
383 #define TRIGGER(_offset, _bit) \ argument
386 .bit = (_bit), \
442 #define CCU_LVM_EN(_offset, _bit) \ argument
445 .bit = (_bit), \
/linux-4.1.27/arch/sh/kernel/cpu/sh4a/
Dclock-sh7366.c120 #define DIV4(_reg, _bit, _mask, _flags) \ argument
121 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
140 #define MSTP(_parent, _reg, _bit, _flags) \ argument
141 SH_CLK_MSTP32(_parent, _reg, _bit, _flags)
Dclock-sh7343.c117 #define DIV4(_reg, _bit, _mask, _flags) \ argument
118 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
137 #define MSTP(_parent, _reg, _bit, _flags) \ argument
138 SH_CLK_MSTP32(_parent, _reg, _bit, _flags)
Dclock-sh7757.c65 #define DIV4(_bit, _mask, _flags) \ argument
66 SH_CLK_DIV4(&pll_clk, FRQCR, _bit, _mask, _flags)
Dclock-shx3.c64 #define DIV4(_bit, _mask, _flags) \ argument
65 SH_CLK_DIV4(&pll_clk, FRQMR1, _bit, _mask, _flags)
Dclock-sh7785.c69 #define DIV4(_bit, _mask, _flags) \ argument
70 SH_CLK_DIV4(&pll_clk, FRQMR1, _bit, _mask, _flags)
Dclock-sh7786.c70 #define DIV4(_bit, _mask, _flags) \ argument
71 SH_CLK_DIV4(&pll_clk, FRQMR1, _bit, _mask, _flags)
Dclock-sh7722.c120 #define DIV4(_reg, _bit, _mask, _flags) \ argument
121 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
Dclock-sh7734.c72 #define DIV4(_reg, _bit, _mask, _flags) \ argument
73 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
Dclock-sh7723.c123 #define DIV4(_reg, _bit, _mask, _flags) \ argument
124 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
Dclock-sh7724.c162 #define DIV4(_reg, _bit, _mask, _flags) \ argument
163 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
/linux-4.1.27/drivers/pinctrl/mediatek/
Dpinctrl-mtk-common.h116 #define MTK_PIN_DRV_GRP(_pin, _offset, _bit, _grp) \ argument
120 .bit = _bit, \
Dpinctrl-mt8173.c42 #define MTK_PIN_IES_SMT_SET(_start, _end, _offset, _bit) \ argument
46 .bit = _bit, \
/linux-4.1.27/arch/sh/kernel/cpu/sh2a/
Dclock-sh7264.c80 #define DIV4(_reg, _bit, _mask, _flags) \ argument
81 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
Dclock-sh7269.c108 #define DIV4(_reg, _bit, _mask, _flags) \ argument
109 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
/linux-4.1.27/drivers/staging/rtl8723au/include/
Dodm_interface.h45 #define ODM_BIT(_name, _pDM_Odm) _cat(_name, _bit)
/linux-4.1.27/arch/arm/mach-shmobile/
Dclock-sh73a0.c222 #define DIV4(_reg, _bit, _mask, _flags) \ argument
223 SH_CLK_DIV4(&pll1_clk, _reg, _bit, _mask, _flags)
559 #define MSTP(_parent, _reg, _bit, _flags) \ argument
560 SH_CLK_MSTP32(_parent, _reg, _bit, _flags)
/linux-4.1.27/drivers/iommu/
Damd_iommu_init.c661 int _bit = bit & 0x3f; in set_dev_entry_bit() local
663 amd_iommu_dev_table[devid].data[i] |= (1UL << _bit); in set_dev_entry_bit()
669 int _bit = bit & 0x3f; in get_dev_entry_bit() local
671 return (amd_iommu_dev_table[devid].data[i] & (1UL << _bit)) >> _bit; in get_dev_entry_bit()
/linux-4.1.27/drivers/input/misc/
Duinput.c667 #define uinput_set_bit(_arg, _bit, _max) \ argument
674 else set_bit((_arg), udev->dev->_bit); \
/linux-4.1.27/drivers/target/
Dtarget_core_configfs.c2087 #define SE_DEV_ALUA_SUPPORT_STATE_SHOW(_name, _var, _bit) \ argument
2091 return sprintf(p, "%d\n", !!(t->_var & _bit)); \
2094 #define SE_DEV_ALUA_SUPPORT_STATE_STORE(_name, _var, _bit) \ argument
2118 t->_var |= _bit; \
2120 t->_var &= ~_bit; \
/linux-4.1.27/Documentation/
Datomic_ops.txt487 If explicit memory barriers are required around {set,clear}_bit() (which do