Searched refs:XGMAC_MTL_IOWRITE_BITS (Results 1 - 2 of 2) sorted by relevance

/linux-4.1.27/drivers/net/ethernet/amd/xgbe/
H A Dxgbe-dev.c251 XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_RQOMR, RSF, val); xgbe_config_rsf_mode()
261 XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_TQOMR, TSF, val); xgbe_config_tsf_mode()
272 XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_RQOMR, RTC, val); xgbe_config_rx_threshold()
283 XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_TQOMR, TTC, val); xgbe_config_tx_threshold()
502 XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_RQOMR, EHFC, 0); xgbe_disable_tx_flow_control()
527 XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_RQOMR, EHFC, 1); xgbe_enable_tx_flow_control()
1326 XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_TC_ETSCR, TSA, xgbe_config_dcb_tc()
1334 XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_TC_ETSCR, TSA, xgbe_config_dcb_tc()
1336 XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_TC_QWR, QW, xgbe_config_dcb_tc()
1871 XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_TQOMR, FTQ, 1); xgbe_flush_tx_queues()
1931 XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_TC_ETSCR, TSA, xgbe_config_mtl_mode()
1933 XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_TC_QWR, QW, 1); xgbe_config_mtl_mode()
2027 XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_TQOMR, TQS, fifo_size); xgbe_config_tx_fifo_size()
2043 XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_RQOMR, RQS, fifo_size); xgbe_config_rx_fifo_size()
2067 XGMAC_MTL_IOWRITE_BITS(pdata, queue, MTL_Q_TQOMR, xgbe_config_queue_mapping()
2074 XGMAC_MTL_IOWRITE_BITS(pdata, queue, MTL_Q_TQOMR, xgbe_config_queue_mapping()
2134 XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_RQFCR, RFA, 2); xgbe_config_flow_control_threshold()
2137 XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_RQFCR, RFD, 4); xgbe_config_flow_control_threshold()
2609 XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_TQOMR, TXQEN, xgbe_enable_tx()
2635 XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_TQOMR, TXQEN, 0); xgbe_disable_tx()
H A Dxgbe-common.h1079 #define XGMAC_MTL_IOWRITE_BITS(_pdata, _n, _reg, _field, _val) \ macro

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