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Searched refs:VLV_DISPLAY_BASE (Results 1 – 4 of 4) sorted by relevance

/linux-4.1.27/drivers/gpu/drm/i915/
Di915_reg.h537 #define VLV_IOSF_DOORBELL_REQ (VLV_DISPLAY_BASE + 0x2100)
554 #define VLV_IOSF_DATA (VLV_DISPLAY_BASE + 0x2104)
555 #define VLV_IOSF_ADDR (VLV_DISPLAY_BASE + 0x2108)
803 #define DPIO_CTL (VLV_DISPLAY_BASE + 0x2110)
1381 #define VLV_DISPLAY_BASE 0x180000 macro
1382 #define VLV_MIPI_BASE VLV_DISPLAY_BASE
1384 #define VLV_GU_CTL0 (VLV_DISPLAY_BASE + 0x2030)
1385 #define VLV_GU_CTL1 (VLV_DISPLAY_BASE + 0x2034)
1391 #define VLV_GUNIT_CLOCK_GATE (VLV_DISPLAY_BASE + 0x2060)
1394 #define VLV_GUNIT_CLOCK_GATE2 (VLV_DISPLAY_BASE + 0x2064)
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Di915_drv.c261 .display_mmio_offset = VLV_DISPLAY_BASE,
272 .display_mmio_offset = VLV_DISPLAY_BASE,
353 .display_mmio_offset = VLV_DISPLAY_BASE,
Dintel_i2c.c587 dev_priv->gpio_mmio_base = VLV_DISPLAY_BASE; in intel_setup_gmbus()
Dintel_display.c13116 if (I915_READ(VLV_DISPLAY_BASE + GEN4_HDMIB) & SDVO_DETECTED && in intel_setup_outputs()
13118 intel_hdmi_init(dev, VLV_DISPLAY_BASE + GEN4_HDMIB, in intel_setup_outputs()
13120 if (I915_READ(VLV_DISPLAY_BASE + DP_B) & DP_DETECTED || in intel_setup_outputs()
13122 intel_dp_init(dev, VLV_DISPLAY_BASE + DP_B, PORT_B); in intel_setup_outputs()
13124 if (I915_READ(VLV_DISPLAY_BASE + GEN4_HDMIC) & SDVO_DETECTED && in intel_setup_outputs()
13126 intel_hdmi_init(dev, VLV_DISPLAY_BASE + GEN4_HDMIC, in intel_setup_outputs()
13128 if (I915_READ(VLV_DISPLAY_BASE + DP_C) & DP_DETECTED || in intel_setup_outputs()
13130 intel_dp_init(dev, VLV_DISPLAY_BASE + DP_C, PORT_C); in intel_setup_outputs()
13133 if (I915_READ(VLV_DISPLAY_BASE + CHV_HDMID) & SDVO_DETECTED) in intel_setup_outputs()
13134 intel_hdmi_init(dev, VLV_DISPLAY_BASE + CHV_HDMID, in intel_setup_outputs()
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