Lines Matching refs:VLV_DISPLAY_BASE
537 #define VLV_IOSF_DOORBELL_REQ (VLV_DISPLAY_BASE + 0x2100)
554 #define VLV_IOSF_DATA (VLV_DISPLAY_BASE + 0x2104)
555 #define VLV_IOSF_ADDR (VLV_DISPLAY_BASE + 0x2108)
803 #define DPIO_CTL (VLV_DISPLAY_BASE + 0x2110)
1381 #define VLV_DISPLAY_BASE 0x180000 macro
1382 #define VLV_MIPI_BASE VLV_DISPLAY_BASE
1384 #define VLV_GU_CTL0 (VLV_DISPLAY_BASE + 0x2030)
1385 #define VLV_GU_CTL1 (VLV_DISPLAY_BASE + 0x2034)
1391 #define VLV_GUNIT_CLOCK_GATE (VLV_DISPLAY_BASE + 0x2060)
1394 #define VLV_GUNIT_CLOCK_GATE2 (VLV_DISPLAY_BASE + 0x2064)
1395 #define VLV_IIR_RW (VLV_DISPLAY_BASE + 0x2084)
1396 #define VLV_IER (VLV_DISPLAY_BASE + 0x20a0)
1397 #define VLV_IIR (VLV_DISPLAY_BASE + 0x20a4)
1398 #define VLV_IMR (VLV_DISPLAY_BASE + 0x20a8)
1399 #define VLV_ISR (VLV_DISPLAY_BASE + 0x20ac)
1400 #define VLV_PCBR (VLV_DISPLAY_BASE + 0x2120)
1538 #define CHV_FUSE_GT (VLV_DISPLAY_BASE + 0x2168)
1879 #define DPIO_PHY_STATUS (VLV_DISPLAY_BASE + 0x6240)
1881 #define DISPLAY_PHY_CONTROL (VLV_DISPLAY_BASE + 0x60100)
1883 #define DISPLAY_PHY_STATUS (VLV_DISPLAY_BASE + 0x60104)
2110 #define FW_BLC_SELF_VLV (VLV_DISPLAY_BASE + 0x6500)
2113 #define MI_ARB_VLV (VLV_DISPLAY_BASE + 0x6504)
2115 #define CZCLK_CDCLK_FREQ_RATIO (VLV_DISPLAY_BASE + 0x6508)
2120 #define GCI_CONTROL (VLV_DISPLAY_BASE + 0x650C)
2127 #define GMBUSFREQ_VLV (VLV_DISPLAY_BASE + 0x6510)
2659 #define _PSRCTLA (VLV_DISPLAY_BASE + 0x60090)
2660 #define _PSRCTLB (VLV_DISPLAY_BASE + 0x61090)
2674 #define _VSCSDPA (VLV_DISPLAY_BASE + 0x600a0)
2675 #define _VSCSDPB (VLV_DISPLAY_BASE + 0x610a0)
2681 #define _PSRSTATA (VLV_DISPLAY_BASE + 0x60094)
2682 #define _PSRSTATB (VLV_DISPLAY_BASE + 0x61094)
2762 #define VLV_ADPA (VLV_DISPLAY_BASE + ADPA)
4056 #define VLV_DPFLIPSTAT (VLV_DISPLAY_BASE + 0x70028)
4077 #define DPINVGTT (VLV_DISPLAY_BASE + 0x7002c) /* VLV/CHV only */
4115 #define DSPARB2 (VLV_DISPLAY_BASE + 0x70060) /* vlv/chv */
4116 #define DSPARB3 (VLV_DISPLAY_BASE + 0x7006c) /* chv */
4157 #define DSPFW4 (VLV_DISPLAY_BASE + 0x70070)
4164 #define DSPFW5 (VLV_DISPLAY_BASE + 0x70074)
4173 #define DSPFW6 (VLV_DISPLAY_BASE + 0x70078)
4176 #define DSPFW7 (VLV_DISPLAY_BASE + 0x7007c)
4177 #define DSPFW7_CHV (VLV_DISPLAY_BASE + 0x700b4) /* wtf #1? */
4186 #define DSPFW8_CHV (VLV_DISPLAY_BASE + 0x700b8)
4195 #define DSPFW9_CHV (VLV_DISPLAY_BASE + 0x7007c) /* wtf #2? */
4206 #define DSPHOWM (VLV_DISPLAY_BASE + 0x70064)
4227 #define DSPHOWM1 (VLV_DISPLAY_BASE + 0x70068)
4250 #define VLV_DDL(pipe) (VLV_DISPLAY_BASE + 0x70050 + 4 * (pipe))
4258 #define CBR1_VLV (VLV_DISPLAY_BASE + 0x70400)
4731 #define _SPACNTR (VLV_DISPLAY_BASE + 0x72180)
4753 #define _SPALINOFF (VLV_DISPLAY_BASE + 0x72184)
4754 #define _SPASTRIDE (VLV_DISPLAY_BASE + 0x72188)
4755 #define _SPAPOS (VLV_DISPLAY_BASE + 0x7218c)
4756 #define _SPASIZE (VLV_DISPLAY_BASE + 0x72190)
4757 #define _SPAKEYMINVAL (VLV_DISPLAY_BASE + 0x72194)
4758 #define _SPAKEYMSK (VLV_DISPLAY_BASE + 0x72198)
4759 #define _SPASURF (VLV_DISPLAY_BASE + 0x7219c)
4760 #define _SPAKEYMAXVAL (VLV_DISPLAY_BASE + 0x721a0)
4761 #define _SPATILEOFF (VLV_DISPLAY_BASE + 0x721a4)
4762 #define _SPACONSTALPHA (VLV_DISPLAY_BASE + 0x721a8)
4764 #define _SPAGAMC (VLV_DISPLAY_BASE + 0x721f4)
4766 #define _SPBCNTR (VLV_DISPLAY_BASE + 0x72280)
4767 #define _SPBLINOFF (VLV_DISPLAY_BASE + 0x72284)
4768 #define _SPBSTRIDE (VLV_DISPLAY_BASE + 0x72288)
4769 #define _SPBPOS (VLV_DISPLAY_BASE + 0x7228c)
4770 #define _SPBSIZE (VLV_DISPLAY_BASE + 0x72290)
4771 #define _SPBKEYMINVAL (VLV_DISPLAY_BASE + 0x72294)
4772 #define _SPBKEYMSK (VLV_DISPLAY_BASE + 0x72298)
4773 #define _SPBSURF (VLV_DISPLAY_BASE + 0x7229c)
4774 #define _SPBKEYMAXVAL (VLV_DISPLAY_BASE + 0x722a0)
4775 #define _SPBTILEOFF (VLV_DISPLAY_BASE + 0x722a4)
4776 #define _SPBCONSTALPHA (VLV_DISPLAY_BASE + 0x722a8)
4777 #define _SPBGAMC (VLV_DISPLAY_BASE + 0x722f4)
4799 #define SPCSCYGOFF(sprite) (VLV_DISPLAY_BASE + 0x6d900 + (sprite) * 0x1000)
4800 #define SPCSCCBOFF(sprite) (VLV_DISPLAY_BASE + 0x6d904 + (sprite) * 0x1000)
4801 #define SPCSCCROFF(sprite) (VLV_DISPLAY_BASE + 0x6d908 + (sprite) * 0x1000)
4805 #define SPCSCC01(sprite) (VLV_DISPLAY_BASE + 0x6d90c + (sprite) * 0x1000)
4806 #define SPCSCC23(sprite) (VLV_DISPLAY_BASE + 0x6d910 + (sprite) * 0x1000)
4807 #define SPCSCC45(sprite) (VLV_DISPLAY_BASE + 0x6d914 + (sprite) * 0x1000)
4808 #define SPCSCC67(sprite) (VLV_DISPLAY_BASE + 0x6d918 + (sprite) * 0x1000)
4809 #define SPCSCC8(sprite) (VLV_DISPLAY_BASE + 0x6d91c + (sprite) * 0x1000)
4813 #define SPCSCYGICLAMP(sprite) (VLV_DISPLAY_BASE + 0x6d920 + (sprite) * 0x1000)
4814 #define SPCSCCBICLAMP(sprite) (VLV_DISPLAY_BASE + 0x6d924 + (sprite) * 0x1000)
4815 #define SPCSCCRICLAMP(sprite) (VLV_DISPLAY_BASE + 0x6d928 + (sprite) * 0x1000)
4819 #define SPCSCYGOCLAMP(sprite) (VLV_DISPLAY_BASE + 0x6d92c + (sprite) * 0x1000)
4820 #define SPCSCCBOCLAMP(sprite) (VLV_DISPLAY_BASE + 0x6d930 + (sprite) * 0x1000)
4821 #define SPCSCCROCLAMP(sprite) (VLV_DISPLAY_BASE + 0x6d934 + (sprite) * 0x1000)
4987 #define VLV_VGACNTRL (VLV_DISPLAY_BASE + 0x71400)
5609 #define VLV_VIDEO_DIP_CTL_A (VLV_DISPLAY_BASE + 0x60200)
5610 #define VLV_VIDEO_DIP_DATA_A (VLV_DISPLAY_BASE + 0x60208)
5611 #define VLV_VIDEO_DIP_GDCP_PAYLOAD_A (VLV_DISPLAY_BASE + 0x60210)
5613 #define VLV_VIDEO_DIP_CTL_B (VLV_DISPLAY_BASE + 0x61170)
5614 #define VLV_VIDEO_DIP_DATA_B (VLV_DISPLAY_BASE + 0x61174)
5615 #define VLV_VIDEO_DIP_GDCP_PAYLOAD_B (VLV_DISPLAY_BASE + 0x61178)
5617 #define CHV_VIDEO_DIP_CTL_C (VLV_DISPLAY_BASE + 0x611f0)
5618 #define CHV_VIDEO_DIP_DATA_C (VLV_DISPLAY_BASE + 0x611f4)
5619 #define CHV_VIDEO_DIP_GDCP_PAYLOAD_C (VLV_DISPLAY_BASE + 0x611f8)
5896 #define PIPEA_PP_STATUS (VLV_DISPLAY_BASE + 0x61200)
5897 #define PIPEA_PP_CONTROL (VLV_DISPLAY_BASE + 0x61204)
5898 #define PIPEA_PP_ON_DELAYS (VLV_DISPLAY_BASE + 0x61208)
5900 #define PIPEA_PP_OFF_DELAYS (VLV_DISPLAY_BASE + 0x6120c)
5901 #define PIPEA_PP_DIVISOR (VLV_DISPLAY_BASE + 0x61210)
5903 #define PIPEB_PP_STATUS (VLV_DISPLAY_BASE + 0x61300)
5904 #define PIPEB_PP_CONTROL (VLV_DISPLAY_BASE + 0x61304)
5905 #define PIPEB_PP_ON_DELAYS (VLV_DISPLAY_BASE + 0x61308)
5906 #define PIPEB_PP_OFF_DELAYS (VLV_DISPLAY_BASE + 0x6130c)
5907 #define PIPEB_PP_DIVISOR (VLV_DISPLAY_BASE + 0x61310)
6197 #define VLV_CHICKEN_3 (VLV_DISPLAY_BASE + 0x7040C)
6396 #define _VLV_HDMIW_HDMIEDID_A (VLV_DISPLAY_BASE + 0x62050)
6397 #define _VLV_HDMIW_HDMIEDID_B (VLV_DISPLAY_BASE + 0x62150)
6401 #define _VLV_AUD_CNTL_ST_A (VLV_DISPLAY_BASE + 0x620B4)
6402 #define _VLV_AUD_CNTL_ST_B (VLV_DISPLAY_BASE + 0x621B4)
6406 #define VLV_AUD_CNTL_ST2 (VLV_DISPLAY_BASE + 0x620C0)
6424 #define _VLV_AUD_CONFIG_A (VLV_DISPLAY_BASE + 0x62000)
6425 #define _VLV_AUD_CONFIG_B (VLV_DISPLAY_BASE + 0x62100)
6874 #define _MIPIA_PORT_CTRL (VLV_DISPLAY_BASE + 0x61190)
6875 #define _MIPIC_PORT_CTRL (VLV_DISPLAY_BASE + 0x61700)
6917 #define _MIPIA_TEARING_CTRL (VLV_DISPLAY_BASE + 0x61194)
6918 #define _MIPIC_TEARING_CTRL (VLV_DISPLAY_BASE + 0x61704)
6925 #define _MIPIA_AUTOPWG (VLV_DISPLAY_BASE + 0x611a0)