Searched refs:UART0_GCTL (Results 1 - 26 of 26) sorted by relevance
| /linux-4.1.27/arch/blackfin/mach-bf537/boards/ |
| H A D | dnp5370.c | 236 .end = UART0_GCTL+2,
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| H A D | minotaur.c | 237 .end = UART0_GCTL+2,
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| H A D | pnav10.c | 305 .end = UART0_GCTL+2,
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| H A D | tcm_bf537.c | 307 .end = UART0_GCTL+2,
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| H A D | cm_bf537e.c | 372 .end = UART0_GCTL+2,
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| H A D | cm_bf537u.c | 307 .end = UART0_GCTL+2,
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| H A D | stamp.c | 1606 .end = UART0_GCTL+2,
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| /linux-4.1.27/arch/blackfin/mach-bf518/boards/ |
| H A D | tcm-bf518.c | 306 .end = UART0_GCTL+2,
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| H A D | ezbrd.c | 371 .end = UART0_GCTL+2,
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| /linux-4.1.27/arch/blackfin/mach-bf527/boards/ |
| H A D | ad7160eval.c | 369 .end = UART0_GCTL+2,
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| H A D | cm_bf527.c | 536 .end = UART0_GCTL+2,
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| H A D | ezbrd.c | 415 .end = UART0_GCTL+2,
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| H A D | tll6527m.c | 490 .end = UART0_GCTL+2,
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| H A D | ezkit.c | 701 .end = UART0_GCTL+2,
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| /linux-4.1.27/arch/blackfin/mach-bf538/boards/ |
| H A D | ezkit.c | 48 .end = UART0_GCTL+2,
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| /linux-4.1.27/arch/blackfin/mach-bf518/include/mach/ |
| H A D | cdefBF512.h | 121 #define bfin_read_UART0_GCTL() bfin_read16(UART0_GCTL)
122 #define bfin_write_UART0_GCTL(val) bfin_write16(UART0_GCTL, val)
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| H A D | defBF512.h | 73 #define UART0_GCTL 0xFFC00424 /* Global Control Register */ macro
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| /linux-4.1.27/arch/blackfin/mach-bf527/include/mach/ |
| H A D | cdefBF522.h | 121 #define bfin_read_UART0_GCTL() bfin_read16(UART0_GCTL)
122 #define bfin_write_UART0_GCTL(val) bfin_write16(UART0_GCTL, val)
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| H A D | defBF522.h | 76 #define UART0_GCTL 0xFFC00424 /* Global Control Register */ macro
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| /linux-4.1.27/arch/blackfin/mach-bf537/include/mach/ |
| H A D | cdefBF534.h | 90 #define bfin_read_UART0_GCTL() bfin_read16(UART0_GCTL)
91 #define bfin_write_UART0_GCTL(val) bfin_write16(UART0_GCTL,val)
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| H A D | defBF534.h | 59 #define UART0_GCTL 0xFFC00424 /* Global Control Register */ macro
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| /linux-4.1.27/arch/blackfin/mach-bf538/include/mach/ |
| H A D | cdefBF538.h | 98 #define bfin_read_UART0_GCTL() bfin_read16(UART0_GCTL)
99 #define bfin_write_UART0_GCTL(val) bfin_write16(UART0_GCTL, val)
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| H A D | defBF538.h | 69 #define UART0_GCTL 0xFFC00424 /* Global Control Register */ macro
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| /linux-4.1.27/arch/blackfin/mach-bf548/include/mach/ |
| H A D | cdefBF54x_base.h | 120 #define bfin_read_UART0_GCTL() bfin_read16(UART0_GCTL)
121 #define bfin_write_UART0_GCTL(val) bfin_write16(UART0_GCTL, val)
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| H A D | defBF54x_base.h | 80 #define UART0_GCTL 0xffc00408 /* Global Control Register */ macro
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| /linux-4.1.27/arch/blackfin/mach-bf609/include/mach/ |
| H A D | cdefBF60x_base.h | 56 #define bfin_read_UART0_GCTL() bfin_read32(UART0_GCTL)
57 #define bfin_write_UART0_GCTL(val) bfin_write32(UART0_GCTL, val)
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