| /linux-4.1.27/drivers/gpu/drm/nouveau/ |
| H A D | nv50_fence.c | 102 ret = nouveau_bo_new(drm->dev, 4096, 0x1000, TTM_PL_FLAG_VRAM, nv50_fence_create()
105 ret = nouveau_bo_pin(priv->bo, TTM_PL_FLAG_VRAM, false); nv50_fence_create()
|
| H A D | nv17_fence.c | 131 ret = nouveau_bo_new(drm->dev, 4096, 0x1000, TTM_PL_FLAG_VRAM, nv17_fence_create()
134 ret = nouveau_bo_pin(priv->bo, TTM_PL_FLAG_VRAM, false); nv17_fence_create()
|
| H A D | nouveau_gem.c | 186 flags |= TTM_PL_FLAG_VRAM; nouveau_gem_new()
300 valid_flags |= TTM_PL_FLAG_VRAM; nouveau_gem_set_domain()
307 pref_flags |= TTM_PL_FLAG_VRAM; nouveau_gem_set_domain()
314 pref_flags |= TTM_PL_FLAG_VRAM; nouveau_gem_set_domain()
|
| H A D | nouveau_display.c | 597 ret = nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM, true); nouveau_display_resume()
607 ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM, true); nouveau_display_resume()
721 ret = nouveau_bo_pin(new_bo, TTM_PL_FLAG_VRAM, true); nouveau_crtc_page_flip()
|
| H A D | nv84_fence.c | 236 domain = drm->device.info.ram_size != 0 ? TTM_PL_FLAG_VRAM : nv84_fence_create()
|
| H A D | nouveau_bo.c | 251 if (type & TTM_PL_FLAG_VRAM) set_placement_list()
252 pl[(*n)++].flags = TTM_PL_FLAG_VRAM | flags; set_placement_list()
267 nvbo->tile_mode && (type & TTM_PL_FLAG_VRAM) && set_placement_range()
325 memtype == TTM_PL_FLAG_VRAM && contig) { nouveau_bo_pin()
1461 nouveau_bo_placement_set(nvbo, TTM_PL_FLAG_VRAM, 0); nouveau_ttm_fault_reserve_notify()
|
| H A D | nv50_display.c | 1101 ret = nouveau_bo_pin(nvfb->nvbo, TTM_PL_FLAG_VRAM, true); nv50_crtc_swap_fbs()
1296 ret = nouveau_bo_pin(nvbo, TTM_PL_FLAG_VRAM, true); nv50_crtc_cursor_set()
1438 ret = nouveau_bo_new(dev, 8192, 0x100, TTM_PL_FLAG_VRAM, nv50_crtc_create()
1441 ret = nouveau_bo_pin(head->base.lut.nvbo, TTM_PL_FLAG_VRAM, true); nv50_crtc_create()
2488 ret = nouveau_bo_new(dev, 4096, 0x1000, TTM_PL_FLAG_VRAM, nv50_display_create()
2491 ret = nouveau_bo_pin(disp->sync, TTM_PL_FLAG_VRAM, true); nv50_display_create()
|
| H A D | nouveau_chan.c | 107 target = TTM_PL_FLAG_VRAM; nouveau_channel_prep()
|
| H A D | nouveau_fbcon.c | 368 ret = nouveau_bo_pin(nvbo, TTM_PL_FLAG_VRAM, false); nouveau_fbcon_create()
|
| /linux-4.1.27/drivers/gpu/drm/vmwgfx/ |
| H A D | vmwgfx_buffer.c | 36 .flags = TTM_PL_FLAG_VRAM | TTM_PL_FLAG_CACHED
42 .flags = TTM_PL_FLAG_VRAM | TTM_PL_FLAG_CACHED | TTM_PL_FLAG_NO_EVICT
86 .flags = TTM_PL_FLAG_VRAM | TTM_PL_FLAG_CACHED
102 .flags = TTM_PL_FLAG_VRAM | TTM_PL_FLAG_CACHED
117 .flags = TTM_PL_FLAG_VRAM | TTM_PL_FLAG_CACHED |
170 .flags = TTM_PL_FLAG_VRAM | TTM_PL_FLAG_CACHED
|
| H A D | vmwgfx_dmabuf.c | 311 pl.flags = TTM_PL_FLAG_VRAM | VMW_PL_FLAG_GMR | VMW_PL_FLAG_MOB vmw_bo_pin()
|
| /linux-4.1.27/drivers/gpu/drm/ast/ |
| H A D | ast_ttm.c | 300 if (domain & TTM_PL_FLAG_VRAM) ast_ttm_placement()
301 bo->placements[c++].flags = TTM_PL_FLAG_WC | TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_VRAM; ast_ttm_placement()
334 ast_ttm_placement(astbo, TTM_PL_FLAG_VRAM | TTM_PL_FLAG_SYSTEM); ast_bo_create()
|
| H A D | ast_mode.c | 539 ret = ast_bo_pin(bo, TTM_PL_FLAG_VRAM, &gpu_addr); ast_crtc_do_set_base()
925 ret = ast_bo_pin(bo, TTM_PL_FLAG_VRAM, &gpu_addr); ast_cursor_init()
|
| /linux-4.1.27/drivers/gpu/drm/bochs/ |
| H A D | bochs_mm.c | 264 if (domain & TTM_PL_FLAG_VRAM) { bochs_ttm_placement()
267 | TTM_PL_FLAG_VRAM; bochs_ttm_placement()
372 bochs_ttm_placement(bochsbo, TTM_PL_FLAG_VRAM | TTM_PL_FLAG_SYSTEM); bochs_bo_create()
|
| H A D | bochs_fbdev.c | 91 ret = bochs_bo_pin(bo, TTM_PL_FLAG_VRAM, NULL); bochsfb_create()
|
| H A D | bochs_kms.c | 71 ret = bochs_bo_pin(bo, TTM_PL_FLAG_VRAM, &gpu_addr); bochs_crtc_mode_set_base()
|
| /linux-4.1.27/drivers/gpu/drm/cirrus/ |
| H A D | cirrus_ttm.c | 304 if (domain & TTM_PL_FLAG_VRAM) cirrus_ttm_placement()
305 bo->placements[c++].flags = TTM_PL_FLAG_WC | TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_VRAM; cirrus_ttm_placement()
338 cirrus_ttm_placement(cirrusbo, TTM_PL_FLAG_VRAM | TTM_PL_FLAG_SYSTEM); cirrus_bo_create()
|
| H A D | cirrus_mode.c | 161 ret = cirrus_bo_pin(bo, TTM_PL_FLAG_VRAM, &gpu_addr); cirrus_crtc_do_set_base()
|
| /linux-4.1.27/drivers/gpu/drm/mgag200/ |
| H A D | mgag200_ttm.c | 300 if (domain & TTM_PL_FLAG_VRAM) mgag200_ttm_placement()
301 bo->placements[c++].flags = TTM_PL_FLAG_WC | TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_VRAM; mgag200_ttm_placement()
334 mgag200_ttm_placement(mgabo, TTM_PL_FLAG_VRAM | TTM_PL_FLAG_SYSTEM); mgag200_bo_create()
|
| H A D | mgag200_cursor.c | 95 ret = mgag200_bo_pin(pixels_1, TTM_PL_FLAG_VRAM, mga_crtc_cursor_set()
101 ret = mgag200_bo_pin(pixels_2, TTM_PL_FLAG_VRAM, mga_crtc_cursor_set()
|
| H A D | mgag200_mode.c | 754 ret = mgag200_bo_pin(bo, TTM_PL_FLAG_VRAM, &gpu_addr); mga_crtc_do_set_base()
|
| /linux-4.1.27/include/drm/ttm/ |
| H A D | ttm_placement.h | 50 #define TTM_PL_FLAG_VRAM (1 << TTM_PL_VRAM) macro
|
| /linux-4.1.27/drivers/gpu/drm/radeon/ |
| H A D | radeon_object.c | 112 TTM_PL_FLAG_VRAM; radeon_ttm_placement_from_domain()
118 TTM_PL_FLAG_VRAM; radeon_ttm_placement_from_domain()
169 (rbo->placements[i].flags & TTM_PL_FLAG_VRAM) && radeon_ttm_placement_from_domain()
351 if ((bo->placements[i].flags & TTM_PL_FLAG_VRAM) && radeon_bo_pin_restricted()
802 if ((rbo->placements[i].flags & TTM_PL_FLAG_VRAM) && radeon_bo_fault_reserve_notify()
|
| H A D | radeon_ttm.c | 215 if (rbo->placements[i].flags & TTM_PL_FLAG_VRAM) { radeon_evict_flags()
|
| /linux-4.1.27/drivers/gpu/drm/nouveau/dispnv04/ |
| H A D | overlay.c | 129 ret = nouveau_bo_pin(nv_fb->nvbo, TTM_PL_FLAG_VRAM, false); nv10_update_plane()
376 ret = nouveau_bo_pin(nv_fb->nvbo, TTM_PL_FLAG_VRAM, false); nv04_update_plane()
|
| H A D | crtc.c | 617 ret = nouveau_bo_pin(nvfb->nvbo, TTM_PL_FLAG_VRAM, false); nv_crtc_swap_fbs()
1130 ret = nouveau_bo_new(dev, 64*64*4, 0x100, TTM_PL_FLAG_VRAM, nv04_crtc_create()
1133 ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM, false); nv04_crtc_create()
|
| /linux-4.1.27/drivers/gpu/drm/qxl/ |
| H A D | qxl_object.c | 62 qbo->placements[c++].flags = TTM_PL_FLAG_CACHED | TTM_PL_FLAG_VRAM | pflag; qxl_ttm_placement_from_domain()
|