Home
last modified time | relevance | path

Searched refs:SRC_MASK_FSYS (Results 1 – 6 of 6) sorted by relevance

/linux-4.1.27/drivers/clk/samsung/
Dclk-exynos5410.c46 #define SRC_MASK_FSYS 0x10340 macro
150 SRC_MASK_FSYS, 0, CLK_SET_RATE_PARENT, 0),
152 SRC_MASK_FSYS, 4, CLK_SET_RATE_PARENT, 0),
154 SRC_MASK_FSYS, 8, CLK_SET_RATE_PARENT, 0),
Dclk-exynos5250.c57 #define SRC_MASK_FSYS 0x10340 macro
141 SRC_MASK_FSYS,
505 SRC_MASK_FSYS, 0, CLK_SET_RATE_PARENT, 0),
507 SRC_MASK_FSYS, 4, CLK_SET_RATE_PARENT, 0),
509 SRC_MASK_FSYS, 8, CLK_SET_RATE_PARENT, 0),
511 SRC_MASK_FSYS, 12, CLK_SET_RATE_PARENT, 0),
513 SRC_MASK_FSYS, 24, CLK_SET_RATE_PARENT, 0),
515 SRC_MASK_FSYS, 28, CLK_SET_RATE_PARENT, 0),
Dclk-exynos4.c64 #define SRC_MASK_FSYS 0xc340 macro
228 SRC_MASK_FSYS,
283 { .offset = SRC_MASK_FSYS, .value = 0x01011111, },
898 GATE(CLK_SCLK_MMC0, "sclk_mmc0", "div_mmc_pre0", SRC_MASK_FSYS, 0,
900 GATE(CLK_SCLK_MMC1, "sclk_mmc1", "div_mmc_pre1", SRC_MASK_FSYS, 4,
902 GATE(CLK_SCLK_MMC2, "sclk_mmc2", "div_mmc_pre2", SRC_MASK_FSYS, 8,
904 GATE(CLK_SCLK_MMC3, "sclk_mmc3", "div_mmc_pre3", SRC_MASK_FSYS, 12,
906 GATE(CLK_SCLK_MMC4, "sclk_mmc4", "div_mmc_pre4", SRC_MASK_FSYS, 16,
1070 SRC_MASK_FSYS, 24, CLK_SET_RATE_PARENT, 0),
1111 SRC_MASK_FSYS, 24, CLK_SET_RATE_PARENT, 0),
Dclk-exynos5420.c80 #define SRC_MASK_FSYS 0x10340 macro
195 SRC_MASK_FSYS,
270 { .offset = SRC_MASK_FSYS, .value = 0x11111110, },
1025 SRC_MASK_FSYS, 24, CLK_SET_RATE_PARENT, 0),
Dclk-exynos3250.c51 #define SRC_MASK_FSYS 0xc340 macro
135 SRC_MASK_FSYS,
Dclk-exynos4415.c70 #define SRC_MASK_FSYS 0xc340 macro
162 SRC_MASK_FSYS,