Searched refs:SPRN_L2CSR0 (Results 1 - 2 of 2) sorted by relevance

/linux-4.1.27/arch/powerpc/kernel/
H A Didle_e500.S64 mtspr SPRN_L2CSR0,r7
66 mfspr r7,SPRN_L2CSR0
/linux-4.1.27/arch/powerpc/include/asm/
H A Dreg_booke.h182 #define SPRN_L2CSR0 0x3F9 /* L2 Data Cache Control and Status Register 0 */ macro

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