Searched refs:SCLK_SPI0 (Results 1 - 35 of 35) sorted by relevance

/linux-4.1.27/arch/mips/boot/dts/include/dt-bindings/clock/
H A Dexynos7-clk.h90 #define SCLK_SPI0 17 macro
H A Dsamsung,s3c64xx-clock.h105 #define SCLK_SPI0 90 macro
H A Drk3188-cru-common.h31 #define SCLK_SPI0 69 macro
H A Ds5pv210.h196 #define SCLK_SPI0 171 macro
H A Drk3288-cru.h26 #define SCLK_SPI0 65 macro
/linux-4.1.27/arch/powerpc/boot/dts/include/dt-bindings/clock/
H A Dexynos7-clk.h90 #define SCLK_SPI0 17 macro
H A Dsamsung,s3c64xx-clock.h105 #define SCLK_SPI0 90 macro
H A Drk3188-cru-common.h31 #define SCLK_SPI0 69 macro
H A Ds5pv210.h196 #define SCLK_SPI0 171 macro
H A Drk3288-cru.h26 #define SCLK_SPI0 65 macro
/linux-4.1.27/arch/arm64/boot/dts/include/dt-bindings/clock/
H A Dexynos7-clk.h90 #define SCLK_SPI0 17 macro
H A Dsamsung,s3c64xx-clock.h105 #define SCLK_SPI0 90 macro
H A Drk3188-cru-common.h31 #define SCLK_SPI0 69 macro
H A Ds5pv210.h196 #define SCLK_SPI0 171 macro
H A Drk3288-cru.h26 #define SCLK_SPI0 65 macro
/linux-4.1.27/arch/metag/boot/dts/include/dt-bindings/clock/
H A Dexynos7-clk.h90 #define SCLK_SPI0 17 macro
H A Dsamsung,s3c64xx-clock.h105 #define SCLK_SPI0 90 macro
H A Drk3188-cru-common.h31 #define SCLK_SPI0 69 macro
H A Ds5pv210.h196 #define SCLK_SPI0 171 macro
H A Drk3288-cru.h26 #define SCLK_SPI0 65 macro
/linux-4.1.27/arch/arm/boot/dts/include/dt-bindings/clock/
H A Dexynos7-clk.h90 #define SCLK_SPI0 17 macro
H A Dsamsung,s3c64xx-clock.h105 #define SCLK_SPI0 90 macro
H A Drk3188-cru-common.h31 #define SCLK_SPI0 69 macro
H A Ds5pv210.h196 #define SCLK_SPI0 171 macro
H A Drk3288-cru.h26 #define SCLK_SPI0 65 macro
/linux-4.1.27/include/dt-bindings/clock/
H A Dexynos7-clk.h90 #define SCLK_SPI0 17 macro
H A Dsamsung,s3c64xx-clock.h105 #define SCLK_SPI0 90 macro
H A Drk3188-cru-common.h31 #define SCLK_SPI0 69 macro
H A Ds5pv210.h196 #define SCLK_SPI0 171 macro
H A Drk3288-cru.h26 #define SCLK_SPI0 65 macro
/linux-4.1.27/drivers/clk/samsung/
H A Dclk-s3c64xx.c323 GATE_SCLK(SCLK_SPI0, "sclk_spi0", "dout_spi0", SCLK_GATE, 20),
424 ALIAS(SCLK_SPI0, "s3c6410-spi.0", "spi_busclk2"),
H A Dclk-s5pv210.c637 GATE(SCLK_SPI0, "sclk_spi0", "dout_spi0", CLK_SRC_MASK0, 16,
H A Dclk-exynos7.c696 GATE(SCLK_SPI0, "sclk_spi0_user", "mout_sclk_spi0_user",
/linux-4.1.27/drivers/clk/rockchip/
H A Dclk-rk3188.c360 COMPOSITE_NOMUX(SCLK_SPI0, "sclk_spi0", "pclk_peri", 0,
H A Dclk-rk3288.c466 COMPOSITE(SCLK_SPI0, "sclk_spi0", mux_pll_src_cpll_gpll_p, 0,

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