Searched refs:REG_FIELD (Results 1 - 67 of 67) sorted by relevance

/linux-4.1.27/arch/cris/arch-v32/mm/
H A Dinit.c78 mmu_kbase_hi = ( REG_FIELD(mmu, rw_mm_kbase_hi, base_f, 0x0) | cris_mmu_init()
80 REG_FIELD(mmu, rw_mm_kbase_hi, base_e, 0x0) | cris_mmu_init()
81 REG_FIELD(mmu, rw_mm_kbase_hi, base_d, 0x5) | cris_mmu_init()
83 REG_FIELD(mmu, rw_mm_kbase_hi, base_e, 0x8) | cris_mmu_init()
84 REG_FIELD(mmu, rw_mm_kbase_hi, base_d, 0x0) | cris_mmu_init()
86 REG_FIELD(mmu, rw_mm_kbase_hi, base_c, 0x4) | cris_mmu_init()
87 REG_FIELD(mmu, rw_mm_kbase_hi, base_b, 0xb) | cris_mmu_init()
88 REG_FIELD(mmu, rw_mm_kbase_hi, base_a, 0x0) | cris_mmu_init()
89 REG_FIELD(mmu, rw_mm_kbase_hi, base_9, 0x0) | cris_mmu_init()
90 REG_FIELD(mmu, rw_mm_kbase_hi, base_8, 0x0)); cris_mmu_init()
92 mmu_kbase_lo = ( REG_FIELD(mmu, rw_mm_kbase_lo, base_7, 0x0) | cris_mmu_init()
93 REG_FIELD(mmu, rw_mm_kbase_lo, base_6, 0x0) | cris_mmu_init()
94 REG_FIELD(mmu, rw_mm_kbase_lo, base_5, 0x0) | cris_mmu_init()
95 REG_FIELD(mmu, rw_mm_kbase_lo, base_4, 0x0) | cris_mmu_init()
96 REG_FIELD(mmu, rw_mm_kbase_lo, base_3, 0x0) | cris_mmu_init()
97 REG_FIELD(mmu, rw_mm_kbase_lo, base_2, 0x0) | cris_mmu_init()
98 REG_FIELD(mmu, rw_mm_kbase_lo, base_1, 0x0) | cris_mmu_init()
99 REG_FIELD(mmu, rw_mm_kbase_lo, base_0, 0x0)); cris_mmu_init()
101 mmu_page_id = REG_FIELD(mmu, rw_mm_tlb_hi, pid, 0); cris_mmu_init()
H A Dtlb.c19 tlb_sel = REG_FIELD(mmu, rw_mm_tlb_sel, idx, val); \
63 mmu_tlb_sel = REG_FIELD(mmu, rw_mm_tlb_sel, idx, i); __flush_tlb_all()
65 mmu_tlb_hi = (REG_FIELD(mmu, rw_mm_tlb_hi, pid, INVALID_PAGEID) __flush_tlb_all()
66 | REG_FIELD(mmu, rw_mm_tlb_hi, vpn, i & 0xf)); __flush_tlb_all()
106 mmu_tlb_hi = (REG_FIELD(mmu, rw_mm_tlb_hi, pid, __flush_tlb_mm()
108 | REG_FIELD(mmu, rw_mm_tlb_hi, vpn, __flush_tlb_mm()
152 mmu_tlb_hi = REG_FIELD(mmu, rw_mm_tlb_hi, pid, __flush_tlb_page()
/linux-4.1.27/drivers/thermal/st/
H A Dst_thermal_syscfg.c39 [TEMP_PWR] = REG_FIELD(STIH415_SAS_THSENS_CONF, 9, 9),
40 [DCORRECT] = REG_FIELD(STIH415_SAS_THSENS_CONF, 4, 8),
41 [OVERFLOW] = REG_FIELD(STIH415_SAS_THSENS_STATUS, 8, 8),
42 [DATA] = REG_FIELD(STIH415_SAS_THSENS_STATUS, 10, 16),
46 [TEMP_PWR] = REG_FIELD(STIH415_MPE_THSENS_CONF, 8, 8),
47 [DCORRECT] = REG_FIELD(STIH415_MPE_THSENS_CONF, 3, 7),
48 [OVERFLOW] = REG_FIELD(STIH415_MPE_THSENS_STATUS, 9, 9),
49 [DATA] = REG_FIELD(STIH415_MPE_THSENS_STATUS, 11, 18),
53 [TEMP_PWR] = REG_FIELD(STIH416_SAS_THSENS_CONF, 9, 9),
54 [DCORRECT] = REG_FIELD(STIH416_SAS_THSENS_CONF, 4, 8),
55 [OVERFLOW] = REG_FIELD(STIH416_SAS_THSENS_STATUS1, 8, 8),
56 [DATA] = REG_FIELD(STIH416_SAS_THSENS_STATUS2, 10, 16),
60 [TEMP_PWR] = REG_FIELD(STID127_THSENS_CONF, 7, 7),
61 [DCORRECT] = REG_FIELD(STID127_THSENS_CONF, 2, 6),
62 [OVERFLOW] = REG_FIELD(STID127_THSENS_STATUS, 9, 9),
63 [DATA] = REG_FIELD(STID127_THSENS_STATUS, 11, 18),
H A Dst_thermal_memmap.c34 [INT_THRESH_HI] = REG_FIELD(STIH416_MPE_INT_THRESH, 0, 7),
35 [DCORRECT] = REG_FIELD(STIH416_MPE_CONF, 5, 9),
36 [OVERFLOW] = REG_FIELD(STIH416_MPE_STATUS, 9, 9),
37 [DATA] = REG_FIELD(STIH416_MPE_STATUS, 11, 18),
38 [INT_ENABLE] = REG_FIELD(STIH416_MPE_INT_EN, 0, 0),
/linux-4.1.27/drivers/reset/sti/
H A Dreset-syscfg.h34 .reset = REG_FIELD(_rr, _rb, _rb), \
35 .ack = REG_FIELD(_ar, _ab, _ab), }
39 .reset = REG_FIELD(_rr, _rb, _rb), }
/linux-4.1.27/arch/cris/include/arch-v32/arch/hwregs/asm/
H A Dirq_nmi_defs_asm.h17 #ifndef REG_FIELD
18 #define REG_FIELD( scope, reg, field, value ) \ macro
H A Dstrcop_defs_asm.h17 #ifndef REG_FIELD
18 #define REG_FIELD( scope, reg, field, value ) \ macro
H A Dstrmux_defs_asm.h17 #ifndef REG_FIELD
18 #define REG_FIELD( scope, reg, field, value ) \ macro
H A Dconfig_defs_asm.h17 #ifndef REG_FIELD
18 #define REG_FIELD( scope, reg, field, value ) \ macro
H A Dcris_defs_asm.h17 #ifndef REG_FIELD
18 #define REG_FIELD( scope, reg, field, value ) \ macro
H A Drt_trace_defs_asm.h17 #ifndef REG_FIELD
18 #define REG_FIELD( scope, reg, field, value ) \ macro
H A Data_defs_asm.h17 #ifndef REG_FIELD
18 #define REG_FIELD( scope, reg, field, value ) \ macro
H A Dbif_slave_defs_asm.h17 #ifndef REG_FIELD
18 #define REG_FIELD( scope, reg, field, value ) \ macro
H A Dmmu_defs_asm.h17 #ifndef REG_FIELD
18 #define REG_FIELD( scope, reg, field, value ) \ macro
H A Dtimer_defs_asm.h17 #ifndef REG_FIELD
18 #define REG_FIELD( scope, reg, field, value ) \ macro
H A Dmarb_defs_asm.h17 #ifndef REG_FIELD
18 #define REG_FIELD( scope, reg, field, value ) \ macro
324 #ifndef REG_FIELD
325 #define REG_FIELD( scope, reg, field, value ) \ macro
H A Dbif_core_defs_asm.h17 #ifndef REG_FIELD
18 #define REG_FIELD( scope, reg, field, value ) \ macro
H A Ddma_defs_asm.h17 #ifndef REG_FIELD
18 #define REG_FIELD( scope, reg, field, value ) \ macro
H A Dgio_defs_asm.h17 #ifndef REG_FIELD
18 #define REG_FIELD( scope, reg, field, value ) \ macro
H A Dintr_vect_defs_asm.h17 #ifndef REG_FIELD
18 #define REG_FIELD( scope, reg, field, value ) \ macro
H A Dser_defs_asm.h17 #ifndef REG_FIELD
18 #define REG_FIELD( scope, reg, field, value ) \ macro
H A Dbif_dma_defs_asm.h17 #ifndef REG_FIELD
18 #define REG_FIELD( scope, reg, field, value ) \ macro
H A Deth_defs_asm.h17 #ifndef REG_FIELD
18 #define REG_FIELD( scope, reg, field, value ) \ macro
H A Dsser_defs_asm.h17 #ifndef REG_FIELD
18 #define REG_FIELD( scope, reg, field, value ) \ macro
/linux-4.1.27/arch/cris/include/arch-v32/arch/hwregs/iop/asm/
H A Diop_version_defs_asm.h17 #ifndef REG_FIELD
18 #define REG_FIELD( scope, reg, field, value ) \ macro
H A Diop_scrc_out_defs_asm.h17 #ifndef REG_FIELD
18 #define REG_FIELD( scope, reg, field, value ) \ macro
H A Diop_fifo_in_extra_defs_asm.h17 #ifndef REG_FIELD
18 #define REG_FIELD( scope, reg, field, value ) \ macro
H A Diop_fifo_out_extra_defs_asm.h17 #ifndef REG_FIELD
18 #define REG_FIELD( scope, reg, field, value ) \ macro
H A Diop_scrc_in_defs_asm.h17 #ifndef REG_FIELD
18 #define REG_FIELD( scope, reg, field, value ) \ macro
H A Diop_trigger_grp_defs_asm.h17 #ifndef REG_FIELD
18 #define REG_FIELD( scope, reg, field, value ) \ macro
H A Diop_crc_par_defs_asm.h17 #ifndef REG_FIELD
18 #define REG_FIELD( scope, reg, field, value ) \ macro
H A Diop_fifo_in_defs_asm.h17 #ifndef REG_FIELD
18 #define REG_FIELD( scope, reg, field, value ) \ macro
H A Diop_mpu_defs_asm.h17 #ifndef REG_FIELD
18 #define REG_FIELD( scope, reg, field, value ) \ macro
H A Diop_sap_in_defs_asm.h17 #ifndef REG_FIELD
18 #define REG_FIELD( scope, reg, field, value ) \ macro
H A Diop_timer_grp_defs_asm.h17 #ifndef REG_FIELD
18 #define REG_FIELD( scope, reg, field, value ) \ macro
H A Diop_dmc_in_defs_asm.h17 #ifndef REG_FIELD
18 #define REG_FIELD( scope, reg, field, value ) \ macro
H A Diop_dmc_out_defs_asm.h17 #ifndef REG_FIELD
18 #define REG_FIELD( scope, reg, field, value ) \ macro
H A Diop_fifo_out_defs_asm.h17 #ifndef REG_FIELD
18 #define REG_FIELD( scope, reg, field, value ) \ macro
H A Diop_sap_out_defs_asm.h17 #ifndef REG_FIELD
18 #define REG_FIELD( scope, reg, field, value ) \ macro
H A Diop_spu_defs_asm.h17 #ifndef REG_FIELD
18 #define REG_FIELD( scope, reg, field, value ) \ macro
H A Diop_sw_spu_defs_asm.h17 #ifndef REG_FIELD
18 #define REG_FIELD( scope, reg, field, value ) \ macro
H A Diop_sw_cfg_defs_asm.h17 #ifndef REG_FIELD
18 #define REG_FIELD( scope, reg, field, value ) \ macro
H A Diop_sw_cpu_defs_asm.h17 #ifndef REG_FIELD
18 #define REG_FIELD( scope, reg, field, value ) \ macro
H A Diop_sw_mpu_defs_asm.h17 #ifndef REG_FIELD
18 #define REG_FIELD( scope, reg, field, value ) \ macro
/linux-4.1.27/arch/cris/include/arch-v32/mach-a3/mach/hwregs/iop/asm/
H A Diop_version_defs_asm.h14 #ifndef REG_FIELD
15 #define REG_FIELD( scope, reg, field, value ) \ macro
H A Diop_sap_in_defs_asm.h14 #ifndef REG_FIELD
15 #define REG_FIELD( scope, reg, field, value ) \ macro
H A Diop_sap_out_defs_asm.h14 #ifndef REG_FIELD
15 #define REG_FIELD( scope, reg, field, value ) \ macro
H A Diop_sw_spu_defs_asm.h14 #ifndef REG_FIELD
15 #define REG_FIELD( scope, reg, field, value ) \ macro
H A Diop_sw_cfg_defs_asm.h14 #ifndef REG_FIELD
15 #define REG_FIELD( scope, reg, field, value ) \ macro
H A Diop_sw_cpu_defs_asm.h14 #ifndef REG_FIELD
15 #define REG_FIELD( scope, reg, field, value ) \ macro
H A Diop_sw_mpu_defs_asm.h14 #ifndef REG_FIELD
15 #define REG_FIELD( scope, reg, field, value ) \ macro
/linux-4.1.27/arch/cris/arch-v32/kernel/
H A Dhead.S62 move.d REG_FIELD(mmu, rw_mm_kbase_hi, base_e, 8) \
63 | REG_FIELD(mmu, rw_mm_kbase_hi, base_c, 4) \
64 | REG_FIELD(mmu, rw_mm_kbase_hi, base_d, 5) \
65 | REG_FIELD(mmu, rw_mm_kbase_hi, base_b, 0xb), $r0
67 move.d REG_FIELD(mmu, rw_mm_kbase_hi, base_e, 8) \
68 | REG_FIELD(mmu, rw_mm_kbase_hi, base_c, 4) \
69 | REG_FIELD(mmu, rw_mm_kbase_hi, base_b, 0xb), $r0
73 move.d REG_FIELD(mmu, rw_mm_kbase_lo, base_4, 4) \
74 | REG_FIELD(mmu, rw_mm_kbase_lo, base_0, 0), $r1
/linux-4.1.27/arch/cris/include/arch-v32/mach-a3/mach/hwregs/asm/
H A Dclkgen_defs_asm.h14 #ifndef REG_FIELD
15 #define REG_FIELD( scope, reg, field, value ) \ macro
H A Dtimer_defs_asm.h14 #ifndef REG_FIELD
15 #define REG_FIELD( scope, reg, field, value ) \ macro
H A Dddr2_defs_asm.h14 #ifndef REG_FIELD
15 #define REG_FIELD( scope, reg, field, value ) \ macro
H A Dpio_defs_asm.h14 #ifndef REG_FIELD
15 #define REG_FIELD( scope, reg, field, value ) \ macro
H A Dpinmux_defs_asm.h14 #ifndef REG_FIELD
15 #define REG_FIELD( scope, reg, field, value ) \ macro
H A Dgio_defs_asm.h14 #ifndef REG_FIELD
15 #define REG_FIELD( scope, reg, field, value ) \ macro
/linux-4.1.27/arch/cris/include/arch-v32/mach-fs/mach/hwregs/asm/
H A Dconfig_defs_asm.h17 #ifndef REG_FIELD
18 #define REG_FIELD( scope, reg, field, value ) \ macro
H A Dtimer_defs_asm.h17 #ifndef REG_FIELD
18 #define REG_FIELD( scope, reg, field, value ) \ macro
H A Dbif_core_defs_asm.h17 #ifndef REG_FIELD
18 #define REG_FIELD( scope, reg, field, value ) \ macro
H A Dgio_defs_asm.h17 #ifndef REG_FIELD
18 #define REG_FIELD( scope, reg, field, value ) \ macro
H A Dpinmux_defs_asm.h17 #ifndef REG_FIELD
18 #define REG_FIELD( scope, reg, field, value ) \ macro
/linux-4.1.27/drivers/pwm/
H A Dpwm-sti.c67 [PWMCLK_PRESCALE_LOW] = REG_FIELD(STI_PWMCR, 0, 3),
68 [PWMCLK_PRESCALE_HIGH] = REG_FIELD(STI_PWMCR, 11, 14),
69 [PWM_EN] = REG_FIELD(STI_PWMCR, 9, 9),
70 [PWM_INT_EN] = REG_FIELD(STI_INTEN, 0, 0),
/linux-4.1.27/drivers/pinctrl/
H A Dpinctrl-st.c66 #define RT_P_CFG0_CLK1NOTCLK0_FIELD(reg) REG_FIELD(reg, 0, 7)
67 #define RT_P_CFG0_DELAY_0_FIELD(reg) REG_FIELD(reg, 16, 23)
68 #define RT_P_CFG0_DELAY_1_FIELD(reg) REG_FIELD(reg, 24, 31)
69 #define RT_P_CFG1_INVERTCLK_FIELD(reg) REG_FIELD(reg, 0, 7)
70 #define RT_P_CFG1_RETIME_FIELD(reg) REG_FIELD(reg, 8, 15)
71 #define RT_P_CFG1_CLKNOTDATA_FIELD(reg) REG_FIELD(reg, 16, 23)
72 #define RT_P_CFG1_DOUBLE_EDGE_FIELD(reg) REG_FIELD(reg, 24, 31)
1161 struct reg_field reg = REG_FIELD(reg_offset, 0, 31); st_pctl_dt_setup_retime_dedicated()
1188 struct reg_field reg = REG_FIELD((data + bank) * 4, lsb, msb); st_pc_get_value()
/linux-4.1.27/drivers/regulator/
H A Dda9063-regulator.c34 REG_FIELD(_reg, __builtin_ffs((int)_mask) - 1, \
/linux-4.1.27/include/linux/
H A Dregmap.h483 #define REG_FIELD(_reg, _lsb, _msb) { \ macro

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