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Searched refs:REG_CLR (Results 1 – 3 of 3) sorted by relevance

/linux-4.1.27/arch/arm/mach-imx/
Danatop.c22 #define REG_CLR 0x8 macro
52 REG_SET : REG_CLR; in imx_anatop_enable_weak2p5()
58 regmap_write(anatop, ANADIG_REG_CORE + (enable ? REG_SET : REG_CLR), in imx_anatop_enable_fet_odrive()
64 regmap_write(anatop, ANADIG_REG_2P5 + (enable ? REG_SET : REG_CLR), in imx_anatop_enable_2p5_pulldown()
70 regmap_write(anatop, ANADIG_ANA_MISC0 + (enable ? REG_SET : REG_CLR), in imx_anatop_disconnect_high_snvs()
/linux-4.1.27/drivers/thermal/
Dimx_thermal.c29 #define REG_CLR 0x8 macro
118 regmap_write(map, TEMPSENSE2 + REG_CLR, TEMPSENSE2_PANIC_VALUE_MASK); in imx_set_panic_temp()
131 regmap_write(map, TEMPSENSE0 + REG_CLR, TEMPSENSE0_ALARM_VALUE_MASK); in imx_set_alarm_temp()
154 regmap_write(map, TEMPSENSE0 + REG_CLR, TEMPSENSE0_POWER_DOWN); in imx_get_temp()
170 regmap_write(map, TEMPSENSE0 + REG_CLR, TEMPSENSE0_MEASURE_TEMP); in imx_get_temp()
231 regmap_write(map, TEMPSENSE0 + REG_CLR, TEMPSENSE0_POWER_DOWN); in imx_set_mode()
239 regmap_write(map, TEMPSENSE0 + REG_CLR, TEMPSENSE0_MEASURE_TEMP); in imx_set_mode()
476 regmap_write(map, MISC1 + REG_CLR, MISC1_IRQ_TEMPHIGH | in imx_thermal_probe()
507 regmap_write(map, TEMPSENSE0 + REG_CLR, TEMPSENSE0_POWER_DOWN); in imx_thermal_probe()
508 regmap_write(map, TEMPSENSE0 + REG_CLR, TEMPSENSE0_MEASURE_TEMP); in imx_thermal_probe()
[all …]
/linux-4.1.27/drivers/video/fbdev/
Dmxsfb.c56 #define REG_CLR 8 macro
381 writel(CTRL_DOTCLK_MODE, host->base + LCDC_CTRL + REG_CLR); in mxsfb_disable_controller()
999 writel(CTRL_RUN, host->base + LCDC_CTRL + REG_CLR); in mxsfb_shutdown()