/linux-4.1.27/arch/cris/arch-v32/mach-fs/ |
H A D | io.c | 24 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pa_oe), 25 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pa_dout), 26 (unsigned long *)REG_ADDR(gio, regi_gio, r_pa_din), 30 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pb_oe), 31 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pb_dout), 32 (unsigned long *)REG_ADDR(gio, regi_gio, r_pb_din), 36 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pc_oe), 37 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pc_dout), 38 (unsigned long *)REG_ADDR(gio, regi_gio, r_pc_din), 42 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pd_oe), 43 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pd_dout), 44 (unsigned long *)REG_ADDR(gio, regi_gio, r_pd_din), 48 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pe_oe), 49 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pe_dout), 50 (unsigned long *)REG_ADDR(gio, regi_gio, r_pe_din),
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H A D | dram_init.S | 28 move.d REG_ADDR(bif_core, regi_bif_core, rw_sdram_cfg_grp0), $r0 31 move.d REG_ADDR(bif_core, regi_bif_core, rw_sdram_cfg_grp1), $r0 68 move.d REG_ADDR(bif_core, regi_bif_core, rw_sdram_timing), $r0 72 move.d REG_ADDR(bif_core, regi_bif_core, rw_sdram_cmd), $r5 98 move.d REG_ADDR(bif_core, regi_bif_core, rw_sdram_timing), $r0
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/linux-4.1.27/arch/cris/arch-v32/mach-a3/ |
H A D | io.c | 20 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pa_oe), 21 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pa_dout), 22 (unsigned long *)REG_ADDR(gio, regi_gio, r_pa_din), 26 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pb_oe), 27 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pb_dout), 28 (unsigned long *)REG_ADDR(gio, regi_gio, r_pb_din), 32 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pc_oe), 33 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pc_dout), 34 (unsigned long *)REG_ADDR(gio, regi_gio, r_pc_din),
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H A D | dram_init.S | 33 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_phy_cfg), $r0 43 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_phy_ctrl), $r0 56 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_ctrl), $r0 74 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_timing), $r0 79 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_latency), $r0 84 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_cfg), $r0
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/linux-4.1.27/arch/cris/include/arch-v32/arch/hwregs/asm/ |
H A D | irq_nmi_defs_asm.h | 43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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H A D | strcop_defs_asm.h | 43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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H A D | strmux_defs_asm.h | 43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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H A D | config_defs_asm.h | 43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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H A D | cris_defs_asm.h | 43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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H A D | rt_trace_defs_asm.h | 43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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H A D | ata_defs_asm.h | 43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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H A D | bif_slave_defs_asm.h | 43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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H A D | mmu_defs_asm.h | 43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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H A D | timer_defs_asm.h | 43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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H A D | marb_defs_asm.h | 43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro 350 #ifndef REG_ADDR 351 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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H A D | bif_core_defs_asm.h | 43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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H A D | dma_defs_asm.h | 43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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H A D | gio_defs_asm.h | 43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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H A D | intr_vect_defs_asm.h | 43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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H A D | ser_defs_asm.h | 43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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H A D | bif_dma_defs_asm.h | 43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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H A D | eth_defs_asm.h | 43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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H A D | sser_defs_asm.h | 43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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/linux-4.1.27/arch/cris/include/arch-v32/arch/hwregs/iop/asm/ |
H A D | iop_version_defs_asm.h | 43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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H A D | iop_scrc_out_defs_asm.h | 43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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H A D | iop_fifo_in_extra_defs_asm.h | 43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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H A D | iop_fifo_out_extra_defs_asm.h | 43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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H A D | iop_scrc_in_defs_asm.h | 43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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H A D | iop_trigger_grp_defs_asm.h | 43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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H A D | iop_crc_par_defs_asm.h | 43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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H A D | iop_fifo_in_defs_asm.h | 43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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H A D | iop_mpu_defs_asm.h | 43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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H A D | iop_sap_in_defs_asm.h | 43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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H A D | iop_timer_grp_defs_asm.h | 43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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H A D | iop_dmc_in_defs_asm.h | 43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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H A D | iop_dmc_out_defs_asm.h | 43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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H A D | iop_fifo_out_defs_asm.h | 43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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H A D | iop_sap_out_defs_asm.h | 43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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H A D | iop_spu_defs_asm.h | 43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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H A D | iop_sw_spu_defs_asm.h | 43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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H A D | iop_sw_cfg_defs_asm.h | 43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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H A D | iop_sw_cpu_defs_asm.h | 43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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H A D | iop_sw_mpu_defs_asm.h | 43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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/linux-4.1.27/arch/cris/include/arch-v32/mach-a3/mach/hwregs/iop/asm/ |
H A D | iop_version_defs_asm.h | 40 #ifndef REG_ADDR 41 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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H A D | iop_sap_in_defs_asm.h | 40 #ifndef REG_ADDR 41 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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H A D | iop_sap_out_defs_asm.h | 40 #ifndef REG_ADDR 41 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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H A D | iop_sw_spu_defs_asm.h | 40 #ifndef REG_ADDR 41 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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H A D | iop_sw_cfg_defs_asm.h | 40 #ifndef REG_ADDR 41 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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H A D | iop_sw_cpu_defs_asm.h | 40 #ifndef REG_ADDR 41 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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H A D | iop_sw_mpu_defs_asm.h | 40 #ifndef REG_ADDR 41 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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/linux-4.1.27/arch/cris/include/arch-v32/mach-a3/mach/hwregs/iop/ |
H A D | iop_version_defs.h | 71 #ifndef REG_ADDR 72 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | iop_sap_in_defs.h | 71 #ifndef REG_ADDR 72 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | iop_sap_out_defs.h | 71 #ifndef REG_ADDR 72 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | iop_sw_spu_defs.h | 71 #ifndef REG_ADDR 72 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | iop_sw_cfg_defs.h | 71 #ifndef REG_ADDR 72 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | iop_sw_cpu_defs.h | 71 #ifndef REG_ADDR 72 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | iop_sw_mpu_defs.h | 71 #ifndef REG_ADDR 72 #define REG_ADDR( scope, inst, reg ) \ macro
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/linux-4.1.27/arch/cris/arch-v32/drivers/mach-a3/ |
H A D | nandflash.c | 67 this->IO_ADDR_W = (void __iomem *)REG_ADDR(pio, crisv32_hwcontrol() 71 this->IO_ADDR_W = (void __iomem *)REG_ADDR(pio, crisv32_hwcontrol() 75 this->IO_ADDR_W = (void __iomem *)REG_ADDR(pio, crisv32_hwcontrol() 146 read_cs = write_cs = (void __iomem *)REG_ADDR(pio, regi_pio, crisv32_nand_flash_probe()
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H A D | gpio.c | 835 REG_WRITE(reg_gio_rw_pwm0_ctrl, REG_ADDR(gio, regi_gio, rw_pwm0_ctrl) + gpio_pwm_set_mode() 851 REG_WRITE(reg_gio_rw_pwm0_var, REG_ADDR(gio, regi_gio, rw_pwm0_var) + gpio_pwm_set_period() 866 REG_WRITE(reg_gio_rw_pwm0_data, REG_ADDR(gio, regi_gio, rw_pwm0_data) + gpio_pwm_set_duty()
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/linux-4.1.27/arch/cris/include/arch-v32/arch/hwregs/iop/ |
H A D | iop_version_defs.h | 74 #ifndef REG_ADDR 75 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | iop_fifo_in_extra_defs.h | 74 #ifndef REG_ADDR 75 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | iop_fifo_out_extra_defs.h | 74 #ifndef REG_ADDR 75 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | iop_scrc_in_defs.h | 74 #ifndef REG_ADDR 75 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | iop_scrc_out_defs.h | 74 #ifndef REG_ADDR 75 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | iop_trigger_grp_defs.h | 74 #ifndef REG_ADDR 75 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | iop_crc_par_defs.h | 74 #ifndef REG_ADDR 75 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | iop_fifo_in_defs.h | 74 #ifndef REG_ADDR 75 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | iop_mpu_defs.h | 74 #ifndef REG_ADDR 75 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | iop_sap_in_defs.h | 74 #ifndef REG_ADDR 75 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | iop_timer_grp_defs.h | 74 #ifndef REG_ADDR 75 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | iop_dmc_in_defs.h | 74 #ifndef REG_ADDR 75 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | iop_dmc_out_defs.h | 74 #ifndef REG_ADDR 75 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | iop_fifo_out_defs.h | 74 #ifndef REG_ADDR 75 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | iop_sap_out_defs.h | 74 #ifndef REG_ADDR 75 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | iop_spu_defs.h | 74 #ifndef REG_ADDR 75 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | iop_sw_spu_defs.h | 74 #ifndef REG_ADDR 75 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | iop_sw_cfg_defs.h | 74 #ifndef REG_ADDR 75 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | iop_sw_cpu_defs.h | 74 #ifndef REG_ADDR 75 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | iop_sw_mpu_defs.h | 74 #ifndef REG_ADDR 75 #define REG_ADDR( scope, inst, reg ) \ macro
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/linux-4.1.27/arch/cris/include/arch-v32/arch/hwregs/ |
H A D | irq_nmi_defs.h | 74 #ifndef REG_ADDR 75 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | strcop_defs.h | 74 #ifndef REG_ADDR 75 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | config_defs.h | 74 #ifndef REG_ADDR 75 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | rt_trace_defs.h | 74 #ifndef REG_ADDR 75 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | ata_defs.h | 74 #ifndef REG_ADDR 75 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | bif_slave_defs.h | 74 #ifndef REG_ADDR 75 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | marb_defs.h | 74 #ifndef REG_ADDR 75 #define REG_ADDR( scope, inst, reg ) \ macro 333 #ifndef REG_ADDR 334 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | bif_core_defs.h | 74 #ifndef REG_ADDR 75 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | eth_defs.h | 74 #ifndef REG_ADDR 75 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | extmem_defs.h | 74 #ifndef REG_ADDR 75 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | ser_defs.h | 74 #ifndef REG_ADDR 75 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | sser_defs.h | 74 #ifndef REG_ADDR 75 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | bif_dma_defs.h | 74 #ifndef REG_ADDR 75 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | dma_defs.h | 74 #ifndef REG_ADDR 75 #define REG_ADDR( scope, inst, reg ) \ macro
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/linux-4.1.27/arch/cris/include/arch-v32/mach-a3/mach/hwregs/ |
H A D | strmux_defs.h | 71 #ifndef REG_ADDR 72 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | clkgen_defs.h | 71 #ifndef REG_ADDR 72 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | l2cache_defs.h | 71 #ifndef REG_ADDR 72 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | marb_bar_defs.h | 71 #ifndef REG_ADDR 72 #define REG_ADDR( scope, inst, reg ) \ macro 355 #ifndef REG_ADDR 356 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | marb_foo_defs.h | 71 #ifndef REG_ADDR 72 #define REG_ADDR( scope, inst, reg ) \ macro 481 #ifndef REG_ADDR 482 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | ddr2_defs.h | 71 #ifndef REG_ADDR 72 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | intr_vect_defs.h | 71 #ifndef REG_ADDR 72 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | pinmux_defs.h | 71 #ifndef REG_ADDR 72 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | pio_defs.h | 71 #ifndef REG_ADDR 72 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | timer_defs.h | 71 #ifndef REG_ADDR 72 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | gio_defs.h | 71 #ifndef REG_ADDR 72 #define REG_ADDR( scope, inst, reg ) \ macro
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/linux-4.1.27/drivers/mfd/ |
H A D | htc-pasic3.c | 29 #define REG_ADDR 5 macro 41 void __iomem *addr = asic->mapping + (REG_ADDR << bus_shift); pasic3_write_register() 56 void __iomem *addr = asic->mapping + (REG_ADDR << bus_shift); pasic3_read_register()
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/linux-4.1.27/arch/cris/include/arch-v32/mach-a3/mach/hwregs/asm/ |
H A D | clkgen_defs_asm.h | 40 #ifndef REG_ADDR 41 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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H A D | timer_defs_asm.h | 40 #ifndef REG_ADDR 41 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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H A D | ddr2_defs_asm.h | 40 #ifndef REG_ADDR 41 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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H A D | pio_defs_asm.h | 40 #ifndef REG_ADDR 41 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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H A D | pinmux_defs_asm.h | 40 #ifndef REG_ADDR 41 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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H A D | gio_defs_asm.h | 40 #ifndef REG_ADDR 41 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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/linux-4.1.27/arch/cris/include/arch-v32/mach-fs/mach/hwregs/asm/ |
H A D | config_defs_asm.h | 43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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H A D | timer_defs_asm.h | 43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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H A D | bif_core_defs_asm.h | 43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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H A D | gio_defs_asm.h | 43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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H A D | pinmux_defs_asm.h | 43 #ifndef REG_ADDR 44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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/linux-4.1.27/arch/cris/include/arch-v32/mach-fs/mach/hwregs/ |
H A D | config_defs.h | 74 #ifndef REG_ADDR 75 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | strmux_defs.h | 74 #ifndef REG_ADDR 75 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | bif_slave_defs.h | 74 #ifndef REG_ADDR 75 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | intr_vect_defs.h | 74 #ifndef REG_ADDR 75 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | marb_defs.h | 74 #ifndef REG_ADDR 75 #define REG_ADDR( scope, inst, reg ) \ macro 333 #ifndef REG_ADDR 334 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | bif_core_defs.h | 74 #ifndef REG_ADDR 75 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | gio_defs.h | 74 #ifndef REG_ADDR 75 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | pinmux_defs.h | 74 #ifndef REG_ADDR 75 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | timer_defs.h | 74 #ifndef REG_ADDR 75 #define REG_ADDR( scope, inst, reg ) \ macro
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H A D | bif_dma_defs.h | 74 #ifndef REG_ADDR 75 #define REG_ADDR( scope, inst, reg ) \ macro
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/linux-4.1.27/drivers/hwmon/ |
H A D | ultra45_env.c | 35 #define REG_ADDR 0x41UL macro 38 /* Registers accessed indirectly via REG_DATA/REG_ADDR */ 72 writeb(ireg, p->regs + REG_ADDR); env_read() 82 writeb(ireg, p->regs + REG_ADDR); env_write()
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/linux-4.1.27/drivers/net/ethernet/apm/xgene/ |
H A D | xgene_enet_sgmac.h | 25 #define REG_ADDR(src) ((src) & GENMASK(4, 0)) macro
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H A D | xgene_enet_sgmac.c | 155 addr = PHY_ADDR(phy_id) | REG_ADDR(reg); xgene_mii_phy_write() 176 addr = PHY_ADDR(phy_id) | REG_ADDR(reg); xgene_mii_phy_read()
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/linux-4.1.27/drivers/net/ethernet/chelsio/cxgb/ |
H A D | my3126.c | 34 #define OFFSET(REG_ADDR) (REG_ADDR << 2)
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H A D | pm3393.c | 48 #define OFFSET(REG_ADDR) ((REG_ADDR) << 2)
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/linux-4.1.27/drivers/spi/ |
H A D | spi-meson-spifc.c | 29 #define REG_ADDR 0x04 macro
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/linux-4.1.27/drivers/net/ethernet/broadcom/bnx2x/ |
H A D | bnx2x.h | 161 #define REG_ADDR(bp, offset) ((bp->regview) + (offset)) macro 163 #define REG_RD(bp, offset) readl(REG_ADDR(bp, offset)) 164 #define REG_RD8(bp, offset) readb(REG_ADDR(bp, offset)) 165 #define REG_RD16(bp, offset) readw(REG_ADDR(bp, offset)) 167 #define REG_WR(bp, offset, val) writel((u32)val, REG_ADDR(bp, offset)) 168 #define REG_WR8(bp, offset, val) writeb((u8)val, REG_ADDR(bp, offset)) 169 #define REG_WR16(bp, offset, val) writew((u16)val, REG_ADDR(bp, offset))
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H A D | bnx2x_vfpf.c | 142 REG_ADDR(bp, PXP_VF_ADDR_CSDM_GLOBAL_START); bnx2x_send_msg2pf()
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/linux-4.1.27/arch/cris/arch-v32/kernel/ |
H A D | entry.S | 395 move.d REG_ADDR(intr_vect, regi_irq, r_nmi), $r0
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