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Searched refs:Q_ADDR (Results 1 – 4 of 4) sorted by relevance

/linux-4.1.27/drivers/net/ethernet/marvell/
Dsky2.c1089 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_CLR_RESET); in sky2_qset()
1090 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_OPER_INIT); in sky2_qset()
1091 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_FIFO_OP_ON); in sky2_qset()
1092 sky2_write32(hw, Q_ADDR(q, Q_WM), BMU_WM_DEFAULT); in sky2_qset()
1288 Q_ADDR(rxqaddr[sky2->port], Q_CSR), in rx_set_checksum()
1319 sky2_write32(hw, Q_ADDR(rxqaddr[sky2->port], Q_CSR), in rx_set_rss()
1322 sky2_write32(hw, Q_ADDR(rxqaddr[sky2->port], Q_CSR), in rx_set_rss()
1352 sky2_write32(hw, Q_ADDR(rxq, Q_CSR), BMU_RST_SET | BMU_FIFO_RST); in sky2_rx_stop()
1543 sky2_write32(hw, Q_ADDR(rxq, Q_WM), BMU_WM_PEX); in sky2_rx_start()
1549 sky2_write32(hw, Q_ADDR(rxq, Q_TEST), F_M_RX_RAM_DIS); in sky2_rx_start()
[all …]
Dskge.c2519 skge_write32(hw, Q_ADDR(q, Q_CSR), CSR_CLR_RESET); in skge_qset()
2520 skge_write32(hw, Q_ADDR(q, Q_F), watermark); in skge_qset()
2521 skge_write32(hw, Q_ADDR(q, Q_DA_H), (u32)(base >> 32)); in skge_qset()
2522 skge_write32(hw, Q_ADDR(q, Q_DA_L), (u32)base); in skge_qset()
2607 skge_write8(hw, Q_ADDR(rxqaddr[port], Q_CSR), CSR_START | CSR_IRQ_CL_F); in skge_up()
2637 skge_write8(hw, Q_ADDR(rxqaddr[port], Q_CSR), CSR_STOP); in skge_rx_stop()
2640 skge_write32(hw, Q_ADDR(rxqaddr[port], Q_CSR), CSR_SET_RESET); in skge_rx_stop()
2678 skge_write8(hw, Q_ADDR(txqaddr[port], Q_CSR), CSR_STOP); in skge_down()
2692 skge_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), CSR_SET_RESET); in skge_down()
2815 skge_write8(hw, Q_ADDR(txqaddr[skge->port], Q_CSR), CSR_START); in skge_xmit_frame()
[all …]
Dsky2.h756 #define Q_ADDR(reg, offs) (B8_Q_REGS + (reg) + (offs)) macro
Dskge.h481 #define Q_ADDR(reg, offs) (B8_Q_REGS + (reg) + (offs)) macro