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Searched refs:PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE (Results 1 – 3 of 3) sorted by relevance

/linux-4.1.27/drivers/gpu/drm/i915/
Dintel_ringbuffer.c277 flags |= PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE; in gen6_render_ring_flush()
349 flags |= PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE; in gen7_render_ring_flush()
420 flags |= PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE; in gen8_render_ring_flush()
Dintel_lrc.c1306 flags |= PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE; in gen8_emit_flush_render()
Di915_reg.h424 #define PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE (1<<11) /* MBZ on Ironlake */ macro