Searched refs:PHYS_OFFSET (Results 1 - 58 of 58) sorted by relevance

/linux-4.1.27/arch/mips/include/asm/mach-ar7/
H A Dspaces.h18 #define PHYS_OFFSET _AC(0x14000000, UL) macro
20 #define UNCAC_BASE _AC(0xb4000000, UL) /* 0xa0000000 + PHYS_OFFSET */
/linux-4.1.27/arch/mips/include/asm/mach-ip28/
H A Dspaces.h14 #define PHYS_OFFSET _AC(0x20000000, UL) macro
/linux-4.1.27/arch/arm/mach-ks8695/include/mach/
H A Dmemory.h37 __dma = __dma - PHYS_OFFSET + KS8695_PCIMEM_PA; \
43 __dma += PHYS_OFFSET - KS8695_PCIMEM_PA; \
/linux-4.1.27/arch/nios2/include/asm/
H A Dpage.h39 #define PHYS_OFFSET CONFIG_NIOS2_MEM_BASE macro
46 #define ARCH_PFN_OFFSET PFN_UP(PHYS_OFFSET)
82 ((unsigned long)(x) - PAGE_OFFSET + PHYS_OFFSET)
84 ((void *)((unsigned long)(x) + PAGE_OFFSET - PHYS_OFFSET))
/linux-4.1.27/arch/mips/include/asm/mach-generic/
H A Dspaces.h18 #ifndef PHYS_OFFSET
19 #define PHYS_OFFSET _AC(0, UL) macro
93 #define PAGE_OFFSET (CAC_BASE + PHYS_OFFSET)
/linux-4.1.27/arch/hexagon/include/asm/
H A Dmem-layout.h37 * an actual PHYS_OFFSET. Should be set up in head.S.
44 #define PHYS_OFFSET __phys_offset macro
47 #ifndef PHYS_OFFSET
48 #define PHYS_OFFSET 0 macro
51 #define PHYS_PFN_OFFSET (PHYS_OFFSET >> PAGE_SHIFT)
H A Dpage.h97 * also, check if we need a PHYS_OFFSET.
99 #define __pa(x) ((unsigned long)(x) - PAGE_OFFSET + PHYS_OFFSET)
100 #define __va(x) ((void *)((unsigned long)(x) - PHYS_OFFSET + PAGE_OFFSET))
/linux-4.1.27/arch/unicore32/include/mach/
H A Dmemory.h18 #define PHYS_OFFSET UL(0x00000000) macro
43 #define PCI_DMA_THRESHOLD (PHYS_OFFSET + SZ_128M - 1)
/linux-4.1.27/arch/arm/mach-footbridge/include/mach/
H A Dmemory.h48 #define __pfn_to_bus(x) (__pfn_to_phys(x) + (BUS_OFFSET - PHYS_OFFSET))
49 #define __bus_to_pfn(x) __phys_to_pfn((x) - (BUS_OFFSET - PHYS_OFFSET))
/linux-4.1.27/arch/arm/mach-omap1/include/mach/
H A Dmemory.h31 __dma = __dma - PHYS_OFFSET + OMAP1510_LB_OFFSET; \
37 __dma += PHYS_OFFSET - OMAP1510_LB_OFFSET; \
/linux-4.1.27/arch/arm64/include/asm/
H A Dmemory.h80 #define __virt_to_phys(x) (((phys_addr_t)(x) - PAGE_OFFSET + PHYS_OFFSET))
81 #define __phys_to_virt(x) ((unsigned long)((x) - PHYS_OFFSET + PAGE_OFFSET))
113 /* PHYS_OFFSET - the physical address of the start of memory. */
114 #define PHYS_OFFSET ({ memstart_addr; }) macro
132 #define PHYS_PFN_OFFSET (PHYS_OFFSET >> PAGE_SHIFT)
H A Dio.h199 * (PHYS_OFFSET and PHYS_MASK taken into account).
/linux-4.1.27/arch/arm/mach-ixp4xx/
H A Dcommon-pci.c355 *PCI_AHBMEMBASE = (PHYS_OFFSET & 0xFF000000) + ixp4xx_pci_preinit()
356 ((PHYS_OFFSET & 0xFF000000) >> 8) + ixp4xx_pci_preinit()
357 ((PHYS_OFFSET & 0xFF000000) >> 16) + ixp4xx_pci_preinit()
358 ((PHYS_OFFSET & 0xFF000000) >> 24) + ixp4xx_pci_preinit()
370 local_write_config(PCI_BASE_ADDRESS_0, 4, PHYS_OFFSET); ixp4xx_pci_preinit()
371 local_write_config(PCI_BASE_ADDRESS_1, 4, PHYS_OFFSET + SZ_16M); ixp4xx_pci_preinit()
372 local_write_config(PCI_BASE_ADDRESS_2, 4, PHYS_OFFSET + SZ_32M); ixp4xx_pci_preinit()
374 PHYS_OFFSET + SZ_32M + SZ_16M); ixp4xx_pci_preinit()
380 local_write_config(PCI_BASE_ADDRESS_4, 4, PHYS_OFFSET + SZ_64M); ixp4xx_pci_preinit()
/linux-4.1.27/arch/unicore32/include/asm/
H A Dmemory.h59 #define __virt_to_phys(x) ((x) - PAGE_OFFSET + PHYS_OFFSET)
60 #define __phys_to_virt(x) ((x) - PHYS_OFFSET + PAGE_OFFSET)
89 #define PHYS_PFN_OFFSET (PHYS_OFFSET >> PAGE_SHIFT)
/linux-4.1.27/arch/arm/mach-iop33x/include/mach/
H A Diop33x.h37 #define IOP3XX_PCI_LOWER_MEM_BA (PHYS_OFFSET + IOP33X_MAX_RAM_SIZE)
/linux-4.1.27/arch/arm/include/asm/
H A Dmemory.h153 * PLAT_PHYS_OFFSET and not PHYS_OFFSET.
168 #define PHYS_OFFSET PLAT_PHYS_OFFSET macro
169 #define PHYS_PFN_OFFSET ((unsigned long)(PHYS_OFFSET >> PAGE_SHIFT))
187 #define PHYS_OFFSET ((phys_addr_t)__pv_phys_pfn_offset << PAGE_SHIFT) macro
252 #define PHYS_OFFSET PLAT_PHYS_OFFSET macro
253 #define PHYS_PFN_OFFSET ((unsigned long)(PHYS_OFFSET >> PAGE_SHIFT))
257 return (phys_addr_t)x - PAGE_OFFSET + PHYS_OFFSET; __virt_to_phys()
262 return x - PHYS_OFFSET + PAGE_OFFSET; __phys_to_virt()
H A Dpgtable-3level-hwdef.h94 * Only use this feature if PHYS_OFFSET <= PAGE_OFFSET, otherwise
/linux-4.1.27/arch/arm/mach-integrator/
H A Dcore.c98 memblock_reserve(PHYS_OFFSET, __pa(swapper_pg_dir) - PHYS_OFFSET); integrator_reserve()
/linux-4.1.27/arch/arm/mach-versatile/
H A Dpci.c293 __raw_writel(PHYS_OFFSET, local_pci_cfg_base + PCI_BASE_ADDRESS_0); pci_versatile_setup()
294 __raw_writel(PHYS_OFFSET, local_pci_cfg_base + PCI_BASE_ADDRESS_1); pci_versatile_setup()
295 __raw_writel(PHYS_OFFSET, local_pci_cfg_base + PCI_BASE_ADDRESS_2); pci_versatile_setup()
329 __raw_writel(PHYS_OFFSET >> 28, PCI_SMAP0); pci_versatile_preinit()
330 __raw_writel(PHYS_OFFSET >> 28, PCI_SMAP1); pci_versatile_preinit()
331 __raw_writel(PHYS_OFFSET >> 28, PCI_SMAP2); pci_versatile_preinit()
/linux-4.1.27/arch/arm/kernel/
H A Dhead-nommu.S71 ldr r5, =PLAT_PHYS_OFFSET @ Region start: PHYS_OFFSET
191 * Region 2: Normal, Shared, cacheable for RAM. From PHYS_OFFSET, size from r6
216 ldr r0, =PLAT_PHYS_OFFSET @ RAM starts at PHYS_OFFSET
219 setup_region r0, r5, r6, MPU_DATA_SIDE @ PHYS_OFFSET, shared, enabled
221 setup_region r0, r5, r6, MPU_INSTR_SIDE @ PHYS_OFFSET, shared, enabled
H A Datags_compat.c157 tag = memtag(tag, PHYS_OFFSET + (i << 26), build_tag_list()
161 tag = memtag(tag, PHYS_OFFSET, params->u1.s.nr_pages * PAGE_SIZE); build_tag_list()
H A Dsetup.c702 if (aligned_start < PHYS_OFFSET) { arm_add_memory()
703 if (aligned_start + size <= PHYS_OFFSET) { arm_add_memory()
704 pr_info("Ignoring memory below PHYS_OFFSET: 0x%08llx-0x%08llx\n", arm_add_memory()
709 pr_info("Ignoring memory below PHYS_OFFSET: 0x%08llx-0x%08llx\n", arm_add_memory()
710 aligned_start, (u64)PHYS_OFFSET); arm_add_memory()
712 size -= PHYS_OFFSET - aligned_start; arm_add_memory()
713 aligned_start = PHYS_OFFSET; arm_add_memory()
753 start = PHYS_OFFSET; early_mem()
H A Dhead.S111 sub r4, r3, r4 @ (PHYS_OFFSET - PAGE_OFFSET)
112 add r8, r8, r4 @ PHYS_OFFSET
582 * PHYS_OFFSET and PAGE_OFFSET, which is assumed to be 16MiB aligned and
591 subs r3, r0, r3 @ PHYS_OFFSET - PAGE_OFFSET
597 str r0, [r6] @ save computed PHYS_OFFSET to __pv_phys_pfn_offset
H A Datags_parse.c188 default_tags.mem.start = PHYS_OFFSET; setup_machine_tags()
/linux-4.1.27/arch/hexagon/kernel/
H A Dsetup.c69 printk(KERN_INFO "PHYS_OFFSET=0x%08x\n", PHYS_OFFSET); setup_arch()
H A Dhead.S52 r25 = and(r2,r25); /* R25 holds PHYS_OFFSET now */
56 r24 = add(r24,r25); /* + PHYS_OFFSET */
214 /* Set PHYS_OFFSET; should be in R25 */
/linux-4.1.27/drivers/pci/host/
H A Dpci-versatile.c101 writel(PHYS_OFFSET >> 28, PCI_SMAP(mem)); resource_list_for_each_entry()
191 writel(PHYS_OFFSET, local_pci_cfg_base + PCI_BASE_ADDRESS_0); versatile_pci_probe()
192 writel(PHYS_OFFSET, local_pci_cfg_base + PCI_BASE_ADDRESS_1); versatile_pci_probe()
193 writel(PHYS_OFFSET, local_pci_cfg_base + PCI_BASE_ADDRESS_2); versatile_pci_probe()
H A Dpci-tegra.c759 afi_writel(pcie, PHYS_OFFSET, AFI_CACHE_BAR0_ST); tegra_pcie_setup_translations()
/linux-4.1.27/arch/unicore32/kernel/
H A Dhead.S23 #if (PHYS_OFFSET & 0x003fffff)
24 #error "PHYS_OFFSET must be at an even 4MiB boundary!"
28 #define KERNEL_RAM_PADDR (PHYS_OFFSET + KERNEL_IMAGE_START)
123 or r6, r7, #(PHYS_OFFSET & 0xffc00000)
H A Dsetup.c184 start = PHYS_OFFSET; early_mem()
/linux-4.1.27/arch/mips/ar7/
H A Dmemory.c64 add_memory_region(PHYS_OFFSET, pages << PAGE_SHIFT, BOOT_MEM_RAM); prom_meminit()
/linux-4.1.27/arch/mips/include/asm/mach-malta/
H A Dspaces.h37 #define PHYS_OFFSET _AC(0x80000000, UL) macro
/linux-4.1.27/arch/arm/mach-realview/include/mach/
H A Dmemory.h50 #define PHYS_OFFSET PLAT_PHYS_OFFSET macro
/linux-4.1.27/arch/arm/common/
H A Dit8152.c251 return (dma_addr + size - PHYS_OFFSET) >= SZ_64M; it8152_needs_bounce()
262 *dev->dma_mask = (SZ_64M - 1) | PHYS_OFFSET; it8152_pci_platform_notify()
263 dev->coherent_dma_mask = (SZ_64M - 1) | PHYS_OFFSET; it8152_pci_platform_notify()
279 if (mask >= PHYS_OFFSET + SZ_64M - 1) dma_set_coherent_mask()
/linux-4.1.27/arch/arm/mm/
H A Dnommu.c91 phys_addr_t phys_offset = PHYS_OFFSET; sanity_check_meminfo_mpu()
102 * PHYS_OFFSET */ for_each_memblock()
104 panic("First memory bank must be contiguous from PHYS_OFFSET"); for_each_memblock()
126 pr_info("PHYS_OFFSET != 0 => MPU Region size constrained by alignment requirements\n");
263 region_err = mpu_setup_region(MPU_RAM_REGION, PHYS_OFFSET, mpu_setup()
H A Dproc-v7-3level.S132 cmp \ttbr1, \tmp @ PHYS_OFFSET > PAGE_OFFSET?
140 * Only use split TTBRs if PHYS_OFFSET <= PAGE_OFFSET (cmp above),
H A Dmmap.c204 if (addr < PHYS_OFFSET) valid_phys_addr_range()
H A Dinit.c129 arm_dma_limit = PHYS_OFFSET + arm_dma_zone_size - 1; setup_dma_zone()
488 free_reserved_area(__va(PHYS_OFFSET), swapper_pg_dir, -1, NULL); mem_init()
H A Dmmu.c1210 memblock_reserve(PHYS_OFFSET, __pa(swapper_pg_dir) - PHYS_OFFSET); arm_mm_memblock_reserve()
/linux-4.1.27/arch/mips/mti-malta/
H A Dmalta-init.c254 mask = PHYS_OFFSET | (1<<3); prom_init()
257 mask = PHYS_OFFSET; prom_init()
H A Dmalta-memory.c98 mdesc[0].base = PHYS_OFFSET; fw_getmdesc()
/linux-4.1.27/arch/nios2/kernel/
H A Dsetup.c167 min_low_pfn, PFN_DOWN(PHYS_OFFSET), max_low_pfn); setup_arch()
169 min_low_pfn, PFN_DOWN(PHYS_OFFSET), setup_arch()
/linux-4.1.27/arch/arm/mach-footbridge/
H A Dcommon.c258 return __pfn_to_phys(pfn) + (fb_bus_sdram_offset() - PHYS_OFFSET); __pfn_to_bus()
264 return __phys_to_pfn(bus - (fb_bus_sdram_offset() - PHYS_OFFSET)); __bus_to_pfn()
/linux-4.1.27/arch/arm/mach-keystone/
H A Dkeystone.c69 phys_addr_t offset = PHYS_OFFSET - KEYSTONE_LOW_PHYS_START; keystone_init_meminfo()
/linux-4.1.27/arch/mips/include/asm/
H A Dpage.h83 #define ARCH_PFN_OFFSET PFN_UP(PHYS_OFFSET)
173 ((unsigned long)(x) - PAGE_OFFSET + PHYS_OFFSET)
175 #define __va(x) ((void *)((unsigned long)(x) + PAGE_OFFSET - PHYS_OFFSET))
H A Dio.h138 return (void *)(address + PAGE_OFFSET - PHYS_OFFSET); phys_to_virt()
/linux-4.1.27/arch/arm64/mm/
H A Dmmap.c103 if (addr < PHYS_OFFSET) valid_phys_addr_range()
H A Dmmu.c356 * PHYS_OFFSET (which must be aligned to 2MB as per map_mem()
360 limit = PHYS_OFFSET + PMD_SIZE; map_mem()
362 limit = PHYS_OFFSET + PUD_SIZE; map_mem()
/linux-4.1.27/arch/arm/mach-clps711x/
H A Dboard-edb7211.c134 memblock_reserve(PHYS_OFFSET, VIDEORAM_SIZE); edb7211_reserve()
H A Dboard-p720t.c314 tag->u.mem.start = PHYS_OFFSET; fixup_p720t()
/linux-4.1.27/arch/arm/mach-tegra/
H A Dpm.c198 cpu_suspend(PHYS_OFFSET - PAGE_OFFSET, &tegra_sleep_cpu); tegra_idle_lp2_last()
343 cpu_suspend(PHYS_OFFSET - PAGE_OFFSET, tegra_sleep_func); tegra_suspend_enter()
/linux-4.1.27/arch/arm/plat-iop/
H A Dpci.c236 *IOP3XX_IABAR2 = PHYS_OFFSET | iop3xx_atu_setup()
240 *IOP3XX_IATVR2 = PHYS_OFFSET; iop3xx_atu_setup()
/linux-4.1.27/arch/nios2/mm/
H A Dioremap.c130 if (phys_addr > PHYS_OFFSET && phys_addr < virt_to_phys(high_memory)) { __ioremap()
/linux-4.1.27/arch/arm64/kernel/
H A Dhead.S432 * Map the kernel image (starting with PHYS_OFFSET).
443 * PHYS_OFFSET).
448 sub x5, x3, x24 // subtract PHYS_OFFSET
487 str_l x24, memstart_addr, x6 // Save PHYS_OFFSET
/linux-4.1.27/arch/arm/mach-iop13xx/
H A Dpci.c571 __raw_writel(~(IOP13XX_MAX_RAM_SIZE - PHYS_OFFSET - 1) & ~0x1, iop13xx_atue_setup()
576 __raw_writel(PHYS_OFFSET | PCI_BASE_ADDRESS_MEM_TYPE_64 | iop13xx_atue_setup()
583 __raw_writel(PHYS_OFFSET, IOP13XX_ATUE_IATVR1); iop13xx_atue_setup()
740 __raw_writel(~(IOP13XX_MAX_RAM_SIZE - PHYS_OFFSET - 1) & ~0x1, iop13xx_atux_setup()
745 __raw_writel(PHYS_OFFSET | PCI_BASE_ADDRESS_MEM_TYPE_64 | iop13xx_atux_setup()
752 __raw_writel(PHYS_OFFSET, IOP13XX_ATUX_IATVR1); iop13xx_atux_setup()
/linux-4.1.27/arch/arm/mach-iop13xx/include/mach/
H A Diop13xx.h83 #define IOP13XX_PCIX_LOWER_MEM_BA (PHYS_OFFSET + IOP13XX_PCI_OFFSET)
104 #define IOP13XX_PCIE_LOWER_MEM_BA (PHYS_OFFSET + IOP13XX_PCI_OFFSET)
/linux-4.1.27/arch/hexagon/mm/
H A Dinit.c34 #define bootmem_startpg (PFN_UP(((unsigned long) _end) - PAGE_OFFSET + PHYS_OFFSET))
/linux-4.1.27/drivers/usb/host/
H A Dohci-omap.c153 physaddr = tlb * 0x00100000 + PHYS_OFFSET; omap_1510_local_bus_init()

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