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Searched refs:PFIT_CONTROL (Results 1 – 16 of 16) sorted by relevance

/linux-4.1.27/drivers/gpu/drm/gma500/
Doaktrail_lvds.c141 REG_WRITE(PFIT_CONTROL, 0); in oaktrail_lvds_mode_set()
147 REG_WRITE(PFIT_CONTROL, PFIT_ENABLE); in oaktrail_lvds_mode_set()
151 REG_WRITE(PFIT_CONTROL, PFIT_ENABLE | in oaktrail_lvds_mode_set()
154 REG_WRITE(PFIT_CONTROL, PFIT_ENABLE | in oaktrail_lvds_mode_set()
157 REG_WRITE(PFIT_CONTROL, PFIT_ENABLE); in oaktrail_lvds_mode_set()
159 REG_WRITE(PFIT_CONTROL, PFIT_ENABLE); in oaktrail_lvds_mode_set()
Dpsb_intel_lvds.c281 lvds_priv->savePFIT_CONTROL = REG_READ(PFIT_CONTROL); in psb_intel_lvds_save()
322 REG_WRITE(PFIT_CONTROL, lvds_priv->savePFIT_CONTROL); in psb_intel_lvds_restore()
499 REG_WRITE(PFIT_CONTROL, pfit_control); in psb_intel_lvds_mode_set()
Dmdfld_device.c221 regs->savePFIT_CONTROL = PSB_RVDC32(PFIT_CONTROL); in mdfld_save_display_registers()
349 PSB_WVDC32(regs->savePFIT_CONTROL, PFIT_CONTROL); in mdfld_restore_display_registers()
Dpsb_intel_display.c93 pfit_control = REG_READ(PFIT_CONTROL); in psb_intel_panel_fitter_pipe()
219 REG_WRITE(PFIT_CONTROL, 0); in psb_intel_crtc_mode_set()
Doaktrail_device.c249 regs->psb.savePFIT_CONTROL = PSB_RVDC32(PFIT_CONTROL); in oaktrail_save_display_registers()
373 PSB_WVDC32(regs->psb.savePFIT_CONTROL, PFIT_CONTROL); in oaktrail_restore_display_registers()
Dcdv_device.c293 regs->cdv.savePFIT_CONTROL = REG_READ(PFIT_CONTROL); in cdv_save_display_registers()
360 REG_WRITE(PFIT_CONTROL, regs->cdv.savePFIT_CONTROL); in cdv_restore_display_registers()
Doaktrail_crtc.c356 pfit_control = REG_READ(PFIT_CONTROL); in oaktrail_panel_fitter_pipe()
427 REG_WRITE(PFIT_CONTROL, 0); in oaktrail_crtc_mode_set()
Dmdfld_intel_display.c115 pfit_control = REG_READ(PFIT_CONTROL); in psb_intel_panel_fitter_pipe()
770 REG_WRITE(PFIT_CONTROL, 0); in mdfld_crtc_mode_set()
Dcdv_intel_display.c570 pfit_control = REG_READ(PFIT_CONTROL); in cdv_intel_panel_fitter_pipe()
776 REG_WRITE(PFIT_CONTROL, 0); in cdv_intel_crtc_mode_set()
Dcdv_intel_lvds.c386 REG_WRITE(PFIT_CONTROL, pfit_control); in cdv_intel_lvds_mode_set()
Dpsb_intel_reg.h217 #define PFIT_CONTROL 0x61230 macro
Dcdv_intel_dp.c1103 REG_WRITE(PFIT_CONTROL, pfit_control); in cdv_intel_dp_mode_set()
/linux-4.1.27/drivers/gpu/drm/i915/
Dintel_overlay.c870 u32 pfit_control = I915_READ(PFIT_CONTROL); in update_pfit_vscale_ratio()
1043 pfit_control = I915_READ(PFIT_CONTROL); in intel_panel_fitter_pipe()
Dintel_lvds.c123 tmp = I915_READ(PFIT_CONTROL); in intel_lvds_get_config()
Dintel_display.c4879 WARN_ON(I915_READ(PFIT_CONTROL) & PFIT_ENABLE); in i9xx_pfit_enable()
4883 I915_WRITE(PFIT_CONTROL, pipe_config->gmch_pfit.control); in i9xx_pfit_enable()
5420 I915_READ(PFIT_CONTROL)); in i9xx_pfit_disable()
5421 I915_WRITE(PFIT_CONTROL, 0); in i9xx_pfit_disable()
6889 tmp = I915_READ(PFIT_CONTROL); in i9xx_get_pfit_config()
Di915_reg.h3125 #define PFIT_CONTROL (dev_priv->info.display_mmio_offset + 0x61230) macro