Searched refs:PCIE_INTR_ENABLE_ADDRESS (Results 1 – 2 of 2) sorted by relevance
351 ath10k_pci_write32(ar, SOC_CORE_BASE_ADDRESS + PCIE_INTR_ENABLE_ADDRESS, in ath10k_pci_disable_and_clear_legacy_irq()359 PCIE_INTR_ENABLE_ADDRESS); in ath10k_pci_disable_and_clear_legacy_irq()365 PCIE_INTR_ENABLE_ADDRESS, in ath10k_pci_enable_legacy_irq()371 PCIE_INTR_ENABLE_ADDRESS); in ath10k_pci_enable_legacy_irq()2368 ath10k_pci_write32(ar, SOC_CORE_BASE_ADDRESS + PCIE_INTR_ENABLE_ADDRESS, in ath10k_pci_init_irq()2376 ath10k_pci_write32(ar, SOC_CORE_BASE_ADDRESS + PCIE_INTR_ENABLE_ADDRESS, in ath10k_pci_deinit_irq_legacy()
403 #define PCIE_INTR_ENABLE_ADDRESS 0x0008 macro