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Searched refs:PANEL_DISPLAY_CTRL (Results 1 – 4 of 4) sorted by relevance

/linux-4.1.27/drivers/staging/sm750fb/
Dddk750_display.c20 ulDisplayCtrlReg = PEEK32(PANEL_DISPLAY_CTRL); in setDisplayControl()
29 PANEL_DISPLAY_CTRL, TIMING, ENABLE); in setDisplayControl()
30 POKE32(PANEL_DISPLAY_CTRL, ulDisplayCtrlReg); in setDisplayControl()
33 PANEL_DISPLAY_CTRL, PLANE, ENABLE); in setDisplayControl()
40 ulReservedBits = FIELD_SET(0, PANEL_DISPLAY_CTRL, RESERVED_1_MASK, ENABLE) | in setDisplayControl()
41 FIELD_SET(0, PANEL_DISPLAY_CTRL, RESERVED_2_MASK, ENABLE) | in setDisplayControl()
42 FIELD_SET(0, PANEL_DISPLAY_CTRL, RESERVED_3_MASK, ENABLE); in setDisplayControl()
51 POKE32(PANEL_DISPLAY_CTRL, ulDisplayCtrlReg); in setDisplayControl()
52 } while((PEEK32(PANEL_DISPLAY_CTRL) & ~ulReservedBits) != in setDisplayControl()
66 PANEL_DISPLAY_CTRL, PLANE, DISABLE); in setDisplayControl()
[all …]
Dddk750_mode.c144 ulTmpValue = FIELD_VALUE(0,PANEL_DISPLAY_CTRL,VSYNC_PHASE,pModeParam->vertical_sync_polarity)| in programModeRegisters()
145 FIELD_VALUE(0,PANEL_DISPLAY_CTRL,HSYNC_PHASE,pModeParam->horizontal_sync_polarity)| in programModeRegisters()
146 FIELD_VALUE(0,PANEL_DISPLAY_CTRL,CLOCK_PHASE,pModeParam->clock_phase_polarity)| in programModeRegisters()
147 FIELD_SET(0,PANEL_DISPLAY_CTRL,TIMING,ENABLE)| in programModeRegisters()
148 FIELD_SET(0,PANEL_DISPLAY_CTRL,PLANE,ENABLE); in programModeRegisters()
150 ulReservedBits = FIELD_SET(0, PANEL_DISPLAY_CTRL, RESERVED_1_MASK, ENABLE) | in programModeRegisters()
151 FIELD_SET(0, PANEL_DISPLAY_CTRL, RESERVED_2_MASK, ENABLE) | in programModeRegisters()
152 FIELD_SET(0, PANEL_DISPLAY_CTRL, RESERVED_3_MASK, ENABLE)| in programModeRegisters()
153 FIELD_SET(0,PANEL_DISPLAY_CTRL,VSYNC,ACTIVE_LOW); in programModeRegisters()
155 ulReg = (PEEK32(PANEL_DISPLAY_CTRL) & ~ulReservedBits) in programModeRegisters()
[all …]
Dsm750_hw.c163 POKE32(PANEL_DISPLAY_CTRL, in hw_sm750_inithw()
164 FIELD_VALUE(PEEK32(PANEL_DISPLAY_CTRL), in hw_sm750_inithw()
165 PANEL_DISPLAY_CTRL, in hw_sm750_inithw()
389 reg = PEEK32(PANEL_DISPLAY_CTRL); in hw_sm750_crtc_setMode()
390 POKE32(PANEL_DISPLAY_CTRL, in hw_sm750_crtc_setMode()
392 PANEL_DISPLAY_CTRL, FORMAT, in hw_sm750_crtc_setMode()
548 …POKE32(PANEL_DISPLAY_CTRL, FIELD_VALUE(PEEK32(PANEL_DISPLAY_CTRL), PANEL_DISPLAY_CTRL, DATA, pps)); in hw_sm750_setBLANK()
Dddk750_reg.h1050 #define PANEL_DISPLAY_CTRL 0x080000 macro